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From 0b1ba174bd5148c0675b335fcebde767a56e10bb Mon Sep 17 00:00:00 2001
From: Ruiqiang Hao <Ruiqiang.Hao@windriver.com>
Date: Mon, 2 Dec 2024 02:18:46 +0000
Subject: [PATCH] Ensure compatibility with ARMv9 by updating .arch directive
The pmem_cvap() function currently uses the '.arch armv8.2-a' directive
for the 'dc cvap' instruction. This will cause build errors below when
compiling for ARMv9 systems. Update the '.arch' directive to 'armv9.4-a'
to ensure compatibility with ARMv9 architectures.
{standard input}: Assembler messages:
{standard input}:169: Error: selected processor does not support `retaa'
{standard input}:286: Error: selected processor does not support `retaa'
make[2]: *** [storage/innobase/CMakeFiles/innobase_embedded.dir/build.make:
1644: storage/innobase/CMakeFiles/innobase_embedded.dir/sync/cache.cc.o]
Error 1
Upstream-Status: Submitted
Signed-off-by: Ruiqiang Hao <Ruiqiang.Hao@windriver.com>
---
storage/innobase/sync/cache.cc | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/storage/innobase/sync/cache.cc b/storage/innobase/sync/cache.cc
index 43d642d0..c5e67709 100644
--- a/storage/innobase/sync/cache.cc
+++ b/storage/innobase/sync/cache.cc
@@ -82,7 +82,12 @@ static void pmem_cvap(const void* buf, size_t size)
for (uintptr_t u= uintptr_t(buf) & ~(CPU_LEVEL1_DCACHE_LINESIZE),
end= uintptr_t(buf) + size;
u < end; u+= CPU_LEVEL1_DCACHE_LINESIZE)
+#if defined __ARM_ARCH && __ARM_ARCH == 9
+ __asm__ __volatile__(".arch armv9.4-a\n dc cvap, %0" :: "r"(u) : "memory");
+#else
__asm__ __volatile__(".arch armv8.2-a\n dc cvap, %0" :: "r"(u) : "memory");
+#endif
+
__asm__ __volatile__("dmb ishst" ::: "memory");
}
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