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authorMartin Jansa <Martin.Jansa@gmail.com>2013-05-28 15:36:00 +0200
committerMartin Jansa <Martin.Jansa@gmail.com>2013-05-28 18:20:26 +0200
commit49319a861790ca35d2f9c8add5a5742b243f5d3d (patch)
tree495de971f4a06714a6109e35d699bb0dcc44fd6d
parentd8ce75b573a187dd2dbea51f5ff4ae6ee778b7b9 (diff)
downloadmeta-qt5-49319a861790ca35d2f9c8add5a5742b243f5d3d.tar.gz
qtjsbackend: refresh hardfloat patch from stable branch
Signed-off-by: Martin Jansa <Martin.Jansa@gmail.com>
Diffstat
-rw-r--r--recipes-qt/qt5/qtjsbackend/0001-Fix-hardfloat-detection.patch33
-rw-r--r--recipes-qt/qt5/qtjsbackend/0003-V8-Cleanup-hardfp-ABI-detection.-This-work-was-trigg.patch190
-rw-r--r--recipes-qt/qt5/qtjsbackend_5.0.2.bb4
3 files changed, 192 insertions, 35 deletions
diff --git a/recipes-qt/qt5/qtjsbackend/0001-Fix-hardfloat-detection.patch b/recipes-qt/qt5/qtjsbackend/0001-Fix-hardfloat-detection.patch
deleted file mode 100644
index 3d86fbf1..00000000
--- a/recipes-qt/qt5/qtjsbackend/0001-Fix-hardfloat-detection.patch
+++ /dev/null
@@ -1,33 +0,0 @@
1From 05a87fccb76447ce3cb4b926128af929f26469bb Mon Sep 17 00:00:00 2001
2From: =?UTF-8?q?Eric=20B=C3=A9nard?= <eric@eukrea.com>
3Date: Wed, 22 May 2013 18:50:01 +0200
4Subject: [PATCH] Fix hardfloat detection
5
6based on the same patch for nodejs which says :
7
8gcc has a builtin define to denote hard abi when in use, e.g. when
9using -mfloat-abi=hard it will define __ARM_PCS_VFP to 1 and therefore
10we should check that to determine which calling convention is in use
11and not __VFP_FP__ which merely indicates presence of VFP unit
12
13The fix has been provided by Khem Raj <raj.khem@gmail.com>
14---
15 src/3rdparty/v8/src/platform-linux.cc | 2 +-
16 1 file changed, 1 insertion(+), 1 deletion(-)
17
18diff --git a/src/3rdparty/v8/src/platform-linux.cc b/src/3rdparty/v8/src/platform-linux.cc
19index f6db423..8ae2249 100644
20--- a/src/3rdparty/v8/src/platform-linux.cc
21+++ b/src/3rdparty/v8/src/platform-linux.cc
22@@ -167,7 +167,7 @@ bool OS::ArmCpuHasFeature(CpuFeature feature) {
23 // calling this will return 1.0 and otherwise 0.0.
24 static void ArmUsingHardFloatHelper() {
25 asm("mov r0, #0":::"r0");
26-#if defined(__VFP_FP__) && !defined(__SOFTFP__)
27+#if defined(__ARM_PCS_VFP) && !defined(__SOFTFP__)
28 // Load 0x3ff00000 into r1 using instructions available in both ARM
29 // and Thumb mode.
30 asm("mov r1, #3":::"r1");
31--
321.7.10.4
33
diff --git a/recipes-qt/qt5/qtjsbackend/0003-V8-Cleanup-hardfp-ABI-detection.-This-work-was-trigg.patch b/recipes-qt/qt5/qtjsbackend/0003-V8-Cleanup-hardfp-ABI-detection.-This-work-was-trigg.patch
new file mode 100644
index 00000000..a1f14141
--- /dev/null
+++ b/recipes-qt/qt5/qtjsbackend/0003-V8-Cleanup-hardfp-ABI-detection.-This-work-was-trigg.patch
@@ -0,0 +1,190 @@
1From d8a3566b013ba581e638cf2b960a8488d5fc9d64 Mon Sep 17 00:00:00 2001
2From: Sergio Martins <sergio.martins@kdab.com>
3Date: Wed, 20 Feb 2013 22:34:46 +0000
4Subject: [PATCH 3/3] [V8] Cleanup hardfp ABI detection. This work was
5 triggered by issue 2140.
6
7Upstream Patch: https://chromiumcodereview.appspot.com/10713009
8
9Task-Number: QTBUG-28890
10Change-Id: Id073388fbbffa2ad9b1cea0ab42e1d6e47862a36
11Reviewed-by: Sean Harmer <sean.harmer@kdab.com>
12Reviewed-by: Simon Hausmann <simon.hausmann@digia.com>
13---
14 src/3rdparty/v8/src/platform-linux.cc | 70 ++++++++++++++++------------------
15 src/3rdparty/v8/src/platform-qnx.cc | 71 ++++++++++++++++-------------------
16 2 files changed, 65 insertions(+), 76 deletions(-)
17
18diff --git a/src/3rdparty/v8/src/platform-linux.cc b/src/3rdparty/v8/src/platform-linux.cc
19index f6db423..18f59dd 100644
20--- a/src/3rdparty/v8/src/platform-linux.cc
21+++ b/src/3rdparty/v8/src/platform-linux.cc
22@@ -161,47 +161,41 @@ bool OS::ArmCpuHasFeature(CpuFeature feature) {
23 }
24
25
26-// Simple helper function to detect whether the C code is compiled with
27-// option -mfloat-abi=hard. The register d0 is loaded with 1.0 and the register
28-// pair r0, r1 is loaded with 0.0. If -mfloat-abi=hard is pased to GCC then
29-// calling this will return 1.0 and otherwise 0.0.
30-static void ArmUsingHardFloatHelper() {
31- asm("mov r0, #0":::"r0");
32-#if defined(__VFP_FP__) && !defined(__SOFTFP__)
33- // Load 0x3ff00000 into r1 using instructions available in both ARM
34- // and Thumb mode.
35- asm("mov r1, #3":::"r1");
36- asm("mov r2, #255":::"r2");
37- asm("lsl r1, r1, #8":::"r1");
38- asm("orr r1, r1, r2":::"r1");
39- asm("lsl r1, r1, #20":::"r1");
40- // For vmov d0, r0, r1 use ARM mode.
41-#ifdef __thumb__
42- asm volatile(
43- "@ Enter ARM Mode \n\t"
44- " adr r3, 1f \n\t"
45- " bx r3 \n\t"
46- " .ALIGN 4 \n\t"
47- " .ARM \n"
48- "1: vmov d0, r0, r1 \n\t"
49- "@ Enter THUMB Mode\n\t"
50- " adr r3, 2f+1 \n\t"
51- " bx r3 \n\t"
52- " .THUMB \n"
53- "2: \n\t":::"r3");
54+bool OS::ArmUsingHardFloat() {
55+ // GCC versions 4.6 and above define __ARM_PCS or __ARM_PCS_VFP to specify
56+ // the Floating Point ABI used (PCS stands for Procedure Call Standard).
57+ // We use these as well as a couple of other defines to statically determine
58+ // what FP ABI used.
59+ // GCC versions 4.4 and below don't support hard-fp.
60+ // GCC versions 4.5 may support hard-fp without defining __ARM_PCS or
61+ // __ARM_PCS_VFP.
62+
63+#define GCC_VERSION (__GNUC__ * 10000 \
64+ + __GNUC_MINOR__ * 100 \
65+ + __GNUC_PATCHLEVEL__)
66+#if GCC_VERSION >= 40600
67+#if defined(__ARM_PCS_VFP)
68+ return true;
69 #else
70- asm("vmov d0, r0, r1");
71-#endif // __thumb__
72-#endif // defined(__VFP_FP__) && !defined(__SOFTFP__)
73- asm("mov r1, #0":::"r1");
74-}
75+ return false;
76+#endif
77
78+#elif GCC_VERSION < 40500
79+ return false;
80
81-bool OS::ArmUsingHardFloat() {
82- // Cast helper function from returning void to returning double.
83- typedef double (*F)();
84- F f = FUNCTION_CAST<F>(FUNCTION_ADDR(ArmUsingHardFloatHelper));
85- return f() == 1.0;
86+#else
87+#if defined(__ARM_PCS_VFP)
88+ return true;
89+#elif defined(__ARM_PCS) || defined(__SOFTFP) || !defined(__VFP_FP__)
90+ return false;
91+#else
92+#error "Your version of GCC does not report the FP ABI compiled for." \
93+ "Please report it on this issue" \
94+ "http://code.google.com/p/v8/issues/detail?id=2140"
95+
96+#endif
97+#endif
98+#undef GCC_VERSION
99 }
100 #endif // def __arm__
101
102diff --git a/src/3rdparty/v8/src/platform-qnx.cc b/src/3rdparty/v8/src/platform-qnx.cc
103index bf9f5ba..46d69b8 100644
104--- a/src/3rdparty/v8/src/platform-qnx.cc
105+++ b/src/3rdparty/v8/src/platform-qnx.cc
106@@ -139,48 +139,43 @@ bool OS::ArmCpuHasFeature(CpuFeature feature) {
107 }
108
109
110-// Simple helper function to detect whether the C code is compiled with
111-// option -mfloat-abi=hard. The register d0 is loaded with 1.0 and the register
112-// pair r0, r1 is loaded with 0.0. If -mfloat-abi=hard is pased to GCC then
113-// calling this will return 1.0 and otherwise 0.0.
114-static void ArmUsingHardFloatHelper() {
115- asm("mov r0, #0");
116-#if defined(__VFP_FP__) && !defined(__SOFTFP__)
117- // Load 0x3ff00000 into r1 using instructions available in both ARM
118- // and Thumb mode.
119- asm("mov r1, #3");
120- asm("mov r2, #255");
121- asm("lsl r1, r1, #8");
122- asm("orr r1, r1, r2");
123- asm("lsl r1, r1, #20");
124- // For vmov d0, r0, r1 use ARM mode.
125-#ifdef __thumb__
126- asm volatile(
127- "@ Enter ARM Mode \n\t"
128- " adr r3, 1f \n\t"
129- " bx r3 \n\t"
130- " .ALIGN 4 \n\t"
131- " .ARM \n"
132- "1: vmov d0, r0, r1 \n\t"
133- "@ Enter THUMB Mode\n\t"
134- " adr r3, 2f+1 \n\t"
135- " bx r3 \n\t"
136- " .THUMB \n"
137- "2: \n\t");
138+bool OS::ArmUsingHardFloat() {
139+ // GCC versions 4.6 and above define __ARM_PCS or __ARM_PCS_VFP to specify
140+ // the Floating Point ABI used (PCS stands for Procedure Call Standard).
141+ // We use these as well as a couple of other defines to statically determine
142+ // what FP ABI used.
143+ // GCC versions 4.4 and below don't support hard-fp.
144+ // GCC versions 4.5 may support hard-fp without defining __ARM_PCS or
145+ // __ARM_PCS_VFP.
146+
147+#define GCC_VERSION (__GNUC__ * 10000 \
148+ + __GNUC_MINOR__ * 100 \
149+ + __GNUC_PATCHLEVEL__)
150+#if GCC_VERSION >= 40600
151+#if defined(__ARM_PCS_VFP)
152+ return true;
153 #else
154- asm("vmov d0, r0, r1");
155-#endif // __thumb__
156-#endif // defined(__VFP_FP__) && !defined(__SOFTFP__)
157- asm("mov r1, #0");
158-}
159+ return false;
160+#endif
161
162+#elif GCC_VERSION < 40500
163+ return false;
164
165-bool OS::ArmUsingHardFloat() {
166- // Cast helper function from returning void to returning double.
167- typedef double (*F)();
168- F f = FUNCTION_CAST<F>(FUNCTION_ADDR(ArmUsingHardFloatHelper));
169- return f() == 1.0;
170+#else
171+#if defined(__ARM_PCS_VFP)
172+ return true;
173+#elif defined(__ARM_PCS) || defined(__SOFTFP) || !defined(__VFP_FP__)
174+ return false;
175+#else
176+#error "Your version of GCC does not report the FP ABI compiled for." \
177+ "Please report it on this issue" \
178+ "http://code.google.com/p/v8/issues/detail?id=2140"
179+
180+#endif
181+#endif
182+#undef GCC_VERSION
183 }
184+
185 #endif // def __arm__
186
187
188--
1891.8.2.1
190
diff --git a/recipes-qt/qt5/qtjsbackend_5.0.2.bb b/recipes-qt/qt5/qtjsbackend_5.0.2.bb
index 0f8638eb..b536da32 100644
--- a/recipes-qt/qt5/qtjsbackend_5.0.2.bb
+++ b/recipes-qt/qt5/qtjsbackend_5.0.2.bb
@@ -4,8 +4,8 @@ require ${PN}.inc
4PR = "${INC_PR}.0" 4PR = "${INC_PR}.0"
5 5
6SRC_URI += " \ 6SRC_URI += " \
7 file://0001-Fix-hardfloat-detection.patch \ 7 file://0003-V8-Cleanup-hardfp-ABI-detection.-This-work-was-trigg.patch \
8 " 8"
9 9
10SRC_URI[md5sum] = "610f011757755888153cb2004c04446f" 10SRC_URI[md5sum] = "610f011757755888153cb2004c04446f"
11SRC_URI[sha256sum] = "65071ab9ab7d9024b7ba6d128a1c97ac09cf1b37818affb4238e4ba7d6665cc0" 11SRC_URI[sha256sum] = "65071ab9ab7d9024b7ba6d128a1c97ac09cf1b37818affb4238e4ba7d6665cc0"
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