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authorNathan Rossi <nathan@nathanrossi.com>2015-12-28 20:40:15 +1000
committerNathan Rossi <nathan@nathanrossi.com>2015-12-28 22:20:35 +1000
commitb98e9384d61f8e19a1028c68abe7dcafd4871de8 (patch)
tree3c1cc90173b98ab0d523e81a2ec5c8c0f4f4463e
parent15469b88849fc9fd6b7ddee328b384757b8b86db (diff)
downloadmeta-xilinx-b98e9384d61f8e19a1028c68abe7dcafd4871de8.tar.gz
qemuzynq: Update clock work around for QEMU 2.5+
The GEM phy in QEMU 2.5+ reports a link speed of 100Mbps, which requires a slower clock. Change the fixed clock to provide a 25MHz reference. Signed-off-by: Nathan Rossi <nathan@nathanrossi.com>
-rw-r--r--conf/machine/boards/qemu/qemuzynq-base.dtsi8
1 files changed, 4 insertions, 4 deletions
diff --git a/conf/machine/boards/qemu/qemuzynq-base.dtsi b/conf/machine/boards/qemu/qemuzynq-base.dtsi
index 9d6b8c75..abb8bf51 100644
--- a/conf/machine/boards/qemu/qemuzynq-base.dtsi
+++ b/conf/machine/boards/qemu/qemuzynq-base.dtsi
@@ -9,14 +9,14 @@
9 reg = <0x0 0x40000000>; 9 reg = <0x0 0x40000000>;
10 } ; 10 } ;
11 ps7_axi_interconnect_0: amba@0 { 11 ps7_axi_interconnect_0: amba@0 {
12 /* Setup a fixed 125 MHz clock to trick the ethernet driver */ 12 /* Setup a fixed 25 MHz clock (100Mbps) to trick the ethernet driver */
13 clk125mhz: clock { 13 fixednetclk: clock {
14 #clock-cells = <0>; 14 #clock-cells = <0>;
15 compatible = "fixed-clock"; 15 compatible = "fixed-clock";
16 clock-frequency = <125000000>; 16 clock-frequency = <25000000>;
17 } ; 17 } ;
18 ps7_ethernet_0: ps7-ethernet@e000b000 { 18 ps7_ethernet_0: ps7-ethernet@e000b000 {
19 clocks = <&clkc 30>, <&clkc 30>, <&clk125mhz>, <&clk125mhz>, <&clkc 30>; 19 clocks = <&clkc 30>, <&clkc 30>, <&fixednetclk>, <&fixednetclk>, <&clkc 30>;
20 phy-handle = <&phy0>; 20 phy-handle = <&phy0>;
21 phy-mode = "gmii"; 21 phy-mode = "gmii";
22 phy0: phy@23 { 22 phy0: phy@23 {