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author | saumya garg <saumya.garg@amd.com> | 2023-07-11 23:59:19 +0530 |
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committer | Mark Hatle <mark.hatle@amd.com> | 2023-07-12 15:00:55 -0500 |
commit | 981066be2074edeb8bcfcd35dd9c490df22d27b0 (patch) | |
tree | 1846250fde57b485da109332767d818fe7d60ed5 | |
parent | e51efc5983dcc119296f8e55cd5737a733e3f459 (diff) | |
download | meta-xilinx-981066be2074edeb8bcfcd35dd9c490df22d27b0.tar.gz |
Update xrt, zocl commit id
Changelog:
fixed MEM tile edge events (#7621)
VITIS-8730: documentation of read, write device memory directly (#7616)
AIE trace improvements and new features (#7591)
fixing aarch64 compilation issue (#7614)
VITIS-8985 Refactor hw context metadata field in query requests (#7610)
CR-1167065 Reset command header prior to starting command (#7608)
Add xrt::ext::bo support for specifying read/write direction (#7607)
Vitis 6327 Add PS kernel xclbins into APU Package (#7594)
VITIS-9144 xbutil report for AIE column topology (#7605)
Adding a precondition to the CU utilization table to make sure it is not printed when there is no data (#7601)
Fix bug in CMake function (#7604)
XRT OS Support for RHEl 8.8 and 9.2 (#7603)
VITIS-8127 Refactor SubCmdConfigure (#7571)
throwing an exception if alloc_bo/alloc_userptrbo is failed (#7602)
Signed-off-by: saumya garg <saumya.garg@amd.com>
Signed-off-by: Mark Hatle <mark.hatle@amd.com>
-rw-r--r-- | meta-xilinx-core/recipes-xrt/xrt/xrt.inc | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/meta-xilinx-core/recipes-xrt/xrt/xrt.inc b/meta-xilinx-core/recipes-xrt/xrt/xrt.inc index 51da5562..eda20f1d 100644 --- a/meta-xilinx-core/recipes-xrt/xrt/xrt.inc +++ b/meta-xilinx-core/recipes-xrt/xrt/xrt.inc | |||
@@ -3,6 +3,6 @@ BRANCHARG = "${@['nobranch=1', 'branch=${BRANCH}'][d.getVar('BRANCH', True) != ' | |||
3 | SRC_URI = "${REPO};${BRANCHARG}" | 3 | SRC_URI = "${REPO};${BRANCHARG}" |
4 | 4 | ||
5 | BRANCH= "master" | 5 | BRANCH= "master" |
6 | SRCREV= "b1e154bed787183eb677d1546fc632d6799895b9" | 6 | SRCREV= "ba5d5fffa4bc5e9d7a1f478998cf730360125a60" |
7 | PV = "202320.2.16.0" | 7 | PV = "202320.2.16.0" |
8 | 8 | ||