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| author | Sivaprasad Addepalli <sivaprasad.addepalli@xilinx.com> | 2024-03-18 19:15:36 +0530 |
|---|---|---|
| committer | Siva Addepalli <sivaprasad.addepalli@xilinx.com> | 2024-03-18 20:17:09 +0530 |
| commit | 5ae412cfed7fa68e0cda39faa7bd714b3d5b32af (patch) | |
| tree | c36ffc8393fc7661a3e4ee2ab19118a306e2379b | |
| parent | e4339455f0d47f336e627f743c75566551d7b547 (diff) | |
| download | meta-xilinx-5ae412cfed7fa68e0cda39faa7bd714b3d5b32af.tar.gz | |
embeddedsw : Updated SRCREV for 2024.1_7691
lib: sw_apps: Fix the race condition when picking a linker from an external path
scripts: pyesw: retarget_app: Remove the dependency of xiltimer in embedded applications
sw_apps: imgsel: zynqmp: Added validation check for SOM usecase
rfdc: CMakeLists dependencies
dfeprach: CMakeLists dependencies
dfeofdm: CMakeLists dependencies
dfemix: CMakeLists dependencies
dfeequ: CMakeLists dependencies
dfeccf: CMakeLists dependencies
trngpsv: Fix doxygen warnings
xilpm: versal_common: server: fix MISRA-C rule 4.7
sw_apps: Added support for Microblaze RISC-V
sw_services:xilsecure:Code redundancy is removed
pciepsu: Add Egress transfer support
Add Authentication Optimization support for MetaHeader
zynq_fsbl: fix prints for 32 bit variables
zynqmp_fsbl: fix prints for 32 bit variables
xilplmi: fix prints for 32 bit variables
dp14txss:dp14rxss: Removed the option of self_test example design
BSP: cortexr5: Move the _TCM_*_REGION definitions to a C source file
drivers:trngpsv:updated yaml file
xilloader: macronix 2G flash part support
xilpm: Secure lockdown house clean time out
Revert "xilpm: versal_net: client: add idle call back support"
csudma: Add doxygen fixes
| -rw-r--r-- | meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass index d5b8ef82..f355f5fd 100644 --- a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass +++ b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass | |||
| @@ -12,7 +12,7 @@ BRANCH ??= "${@d.getVarFlag('ESW_BRANCH', d.getVar('ESW_VER')) or '${ESW_VER}'}" | |||
| 12 | ESW_REV[git] = "${AUTOREV}" | 12 | ESW_REV[git] = "${AUTOREV}" |
| 13 | ESW_REV[2023.1] = "af784f742dad0ca6e69e05baf8de51152c396b9a" | 13 | ESW_REV[2023.1] = "af784f742dad0ca6e69e05baf8de51152c396b9a" |
| 14 | ESW_REV[2023.2] = "73f0904e41cc109f18bb19a5329d0e5a66af2434" | 14 | ESW_REV[2023.2] = "73f0904e41cc109f18bb19a5329d0e5a66af2434" |
| 15 | ESW_REV[2024.1] = "ad038fbbeccd66f126ad80980452b8fecee60e4f" | 15 | ESW_REV[2024.1] = "594958ff1630ffd0488b9e0bac9cb9473c05098b" |
| 16 | SRCREV ??= "${@d.getVarFlag('ESW_REV', d.getVar('ESW_VER')) or 'INVALID'}" | 16 | SRCREV ??= "${@d.getVarFlag('ESW_REV', d.getVar('ESW_VER')) or 'INVALID'}" |
| 17 | 17 | ||
| 18 | EMBEDDEDSW_BRANCHARG ?= "${@['nobranch=1', 'branch=${BRANCH}'][d.getVar('BRANCH') != '']}" | 18 | EMBEDDEDSW_BRANCHARG ?= "${@['nobranch=1', 'branch=${BRANCH}'][d.getVar('BRANCH') != '']}" |