meta-microblaze: Update to gcc 13

Signed-off-by: Mark Hatle <mark.hatle@amd.com>

61 files changed, 509 insertions, 495 deletions

diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-12/0001-LOCAL-Testsuite-builtins-tests-require-fpic.patch b/meta-microblaze/recipes-devtools/gcc/gcc-13/0001-LOCAL-Testsuite-builtins-tests-require-fpic-Signed-o.patch
index 1099a0e8..8b9c6177 100644
--- a/meta-microblaze/recipes-devtools/gcc/gcc-12/0001-LOCAL-Testsuite-builtins-tests-require-fpic.patch
+++ b/meta-microblaze/recipes-devtools/gcc/gcc-13/0001-LOCAL-Testsuite-builtins-tests-require-fpic-Signed-o.patch
@@ -1,7 +1,7 @@
-From 376b0ee790231a99fe50b50e20070c104bbba0d8 Mon Sep 17 00:00:00 2001
+From 8beb2e85436c77db197ce22626c7b7037d41d595 Mon Sep 17 00:00:00 2001
 From: Mahesh Bodapati <mbodapat@xilinx.com>
 Date: Wed, 11 Jan 2017 13:13:57 +0530
-Subject: [PATCH 01/53] LOCAL]: Testsuite - builtins tests require fpic
+Subject: [PATCH 01/54] LOCAL]: Testsuite - builtins tests require fpic
  Signed-off-by: David Holsgrove <david.holsgrove@xilinx.com>
 
 Conflicts:
@@ -12,7 +12,7 @@ Conflicts:
  1 file changed, 8 insertions(+)
 
 diff --git a/gcc/testsuite/gcc.c-torture/execute/builtins/builtins.exp b/gcc/testsuite/gcc.c-torture/execute/builtins/builtins.exp
-index fb47f51f90c..d9ecf045554 100644
+index fa762d33232..ce8545fc460 100644
 --- a/gcc/testsuite/gcc.c-torture/execute/builtins/builtins.exp
 +++ b/gcc/testsuite/gcc.c-torture/execute/builtins/builtins.exp
 @@ -48,6 +48,14 @@ if { [istarget *-*-eabi*]
@@ -31,5 +31,5 @@ index fb47f51f90c..d9ecf045554 100644
      if {![string match *-lib.c $src] && [runtest_file_p $runtests $src]} {
         c-torture-execute [list $src \
 -- 
-2.37.1 (Apple Git-137.1)
+2.34.1
 
diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-12/0002-LOCAL-Quick-fail-g-.dg-opt-memcpy1.C.patch b/meta-microblaze/recipes-devtools/gcc/gcc-13/0002-Quick-fail-g-.dg-opt-memcpy1.C-This-particular-testc.patch
index 061dfc86..94970e7b 100644
--- a/meta-microblaze/recipes-devtools/gcc/gcc-12/0002-LOCAL-Quick-fail-g-.dg-opt-memcpy1.C.patch
+++ b/meta-microblaze/recipes-devtools/gcc/gcc-13/0002-Quick-fail-g-.dg-opt-memcpy1.C-This-particular-testc.patch
@@ -1,10 +1,10 @@
-From b1aea8e71692065497ee3e9be5a9f1fccecf5685 Mon Sep 17 00:00:00 2001
+From 4a2d958fe0d54c78b7a131b9cde1c74165533aaf Mon Sep 17 00:00:00 2001
 From: Mahesh Bodapati <mbodapat@xilinx.com>
 Date: Wed, 11 Jan 2017 14:31:10 +0530
-Subject: [PATCH 02/53] [LOCAL]: Quick fail g++.dg/opt/memcpy1.C This
- particular testcase fails with a timeout. Instead, fail it at compile-time
- for microblaze. This speeds up the testsuite without removing it from the
- FAIL reports.
+Subject: [PATCH 02/54] Quick fail g++.dg/opt/memcpy1.C This particular
+ testcase fails with a timeout. Instead, fail it at compile-time for
+ microblaze. This speeds up the testsuite without removing it from the FAIL
+ reports.
 
 Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
 ---
@@ -27,5 +27,5 @@ index 3862756083d..db9f990f781 100644
  typedef uint8_t uint8;
  __extension__ typedef __SIZE_TYPE__ size_t;
 -- 
-2.37.1 (Apple Git-137.1)
+2.34.1
 
diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-12/0003-LOCAL-For-dejagnu-static-testing-on-qemu-suppress-wa.patch b/meta-microblaze/recipes-devtools/gcc/gcc-13/0003-For-dejagnu-static-testing-on-qemu-suppress-warnings.patch
index 1b5d428e..5b4466d8 100644
--- a/meta-microblaze/recipes-devtools/gcc/gcc-12/0003-LOCAL-For-dejagnu-static-testing-on-qemu-suppress-wa.patch
+++ b/meta-microblaze/recipes-devtools/gcc/gcc-13/0003-For-dejagnu-static-testing-on-qemu-suppress-warnings.patch
@@ -1,9 +1,9 @@
-From af78edb2cb91c55f54ac2d720cee9871da13b845 Mon Sep 17 00:00:00 2001
+From 0b4ec0cbfc13f5a40a20663da9c074ac81c5ec3f Mon Sep 17 00:00:00 2001
 From: Mahesh Bodapati <mbodapat@xilinx.com>
 Date: Wed, 11 Jan 2017 15:46:28 +0530
-Subject: [PATCH 03/53] [LOCAL]: For dejagnu static testing on qemu, suppress
- warnings about multiple definitions from the test function and libc in line
- with method used by powerpc. Dynamic linking and using a qemu binary which
+Subject: [PATCH 03/54] For dejagnu static testing on qemu, suppress warnings
+ about multiple definitions from the test function and libc in line with
+ method used by powerpc. Dynamic linking and using a qemu binary which
  understands sysroot resolves all test failures with builtins
 
 Signed-off-by: David Holsgrove <david.holsgrove@xilinx.com>
@@ -12,7 +12,7 @@ Signed-off-by: David Holsgrove <david.holsgrove@xilinx.com>
  1 file changed, 4 deletions(-)
 
 diff --git a/gcc/testsuite/gcc.c-torture/execute/builtins/builtins.exp b/gcc/testsuite/gcc.c-torture/execute/builtins/builtins.exp
-index d9ecf045554..d6c2b04f286 100644
+index ce8545fc460..72fd697d855 100644
 --- a/gcc/testsuite/gcc.c-torture/execute/builtins/builtins.exp
 +++ b/gcc/testsuite/gcc.c-torture/execute/builtins/builtins.exp
 @@ -48,14 +48,10 @@ if { [istarget *-*-eabi*]
@@ -31,5 +31,5 @@ index d9ecf045554..d6c2b04f286 100644
      if {![string match *-lib.c $src] && [runtest_file_p $runtests $src]} {
         c-torture-execute [list $src \
 -- 
-2.37.1 (Apple Git-137.1)
+2.34.1
 
diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-12/0004-Patch-testsuite-Add-MicroBlaze-to-target-supports-fo.patch b/meta-microblaze/recipes-devtools/gcc/gcc-13/0004-Add-MicroBlaze-to-target-supports-for-atomic-buil.-..patch
index 8db33100..87adeaf4 100644
--- a/meta-microblaze/recipes-devtools/gcc/gcc-12/0004-Patch-testsuite-Add-MicroBlaze-to-target-supports-fo.patch
+++ b/meta-microblaze/recipes-devtools/gcc/gcc-13/0004-Add-MicroBlaze-to-target-supports-for-atomic-buil.-..patch
@@ -1,8 +1,8 @@
-From 34b7dd28e3fe40f55ec7f6df3f000dd797d6c1cc Mon Sep 17 00:00:00 2001
+From dcb106f7cb2fb68f3117677b12df2b01f3929f7b Mon Sep 17 00:00:00 2001
 From: Mahesh Bodapati <mbodapat@xilinx.com>
 Date: Wed, 11 Jan 2017 15:50:35 +0530
-Subject: [PATCH 04/53] [Patch, testsuite]: Add MicroBlaze to target-supports
- for atomic buil. .tin tests
+Subject: [PATCH 04/54] Add MicroBlaze to target-supports for atomic buil. .tin
+ tests
 
 MicroBlaze added to supported targets for atomic builtin tests.
 
@@ -19,10 +19,10 @@ Signed-off-by: David Holsgrove <david.holsgrove@xilinx.com>
  1 file changed, 1 insertion(+)
 
 diff --git a/gcc/testsuite/lib/target-supports.exp b/gcc/testsuite/lib/target-supports.exp
-index 244fe2306f4..c19f251f0d2 100644
+index 40f71e9ed8b..32e29706fcd 100644
 --- a/gcc/testsuite/lib/target-supports.exp
 +++ b/gcc/testsuite/lib/target-supports.exp
-@@ -8639,6 +8639,7 @@ proc check_effective_target_sync_int_long { } {
+@@ -8947,6 +8947,7 @@ proc check_effective_target_sync_int_long { } {
                  && [check_effective_target_arm_acq_rel])
              || [istarget bfin*-*linux*]
              || [istarget hppa*-*linux*]
@@ -31,5 +31,5 @@ index 244fe2306f4..c19f251f0d2 100644
              || [istarget powerpc*-*-*]
              || [istarget cris-*-*]
 -- 
-2.37.1 (Apple Git-137.1)
+2.34.1
 
diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-12/0005-Patch-testsuite-Update-MicroBlaze-strings-test.patch b/meta-microblaze/recipes-devtools/gcc/gcc-13/0005-Update-MicroBlaze-strings-test-for-new-scan-assembly.patch
index 0fb32850..9a8d0a86 100644
--- a/meta-microblaze/recipes-devtools/gcc/gcc-12/0005-Patch-testsuite-Update-MicroBlaze-strings-test.patch
+++ b/meta-microblaze/recipes-devtools/gcc/gcc-13/0005-Update-MicroBlaze-strings-test-for-new-scan-assembly.patch
@@ -1,8 +1,8 @@
-From 2d0b5d68aff95a95dfb4ed0b207849658502bd53 Mon Sep 17 00:00:00 2001
+From 68bc05ae258334f591c336dbed6dc907969e90fc Mon Sep 17 00:00:00 2001
 From: Mahesh Bodapati <mbodapat@xilinx.com>
 Date: Wed, 11 Jan 2017 16:20:01 +0530
-Subject: [PATCH 05/53] [Patch, testsuite]: Update MicroBlaze strings test for
- new scan-assembly output resulting in use of $LC label
+Subject: [PATCH 05/54] Update MicroBlaze strings test for new scan-assembly
+ output resulting in use of $LC label
 
 ChangeLog/testsuite
 
@@ -32,5 +32,5 @@ index efaf3c660ea..347872360d3 100644
  
  extern void somefunc (char *);
 -- 
-2.37.1 (Apple Git-137.1)
+2.34.1
 
diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-12/0006-Patch-testsuite-Allow-MicroBlaze-.weakext-pattern-in.patch b/meta-microblaze/recipes-devtools/gcc/gcc-13/0006-Allow-MicroBlaze-.weakext-pattern-in-regex-match-Ext.patch
index a82f11cc..c32a8bab 100644
--- a/meta-microblaze/recipes-devtools/gcc/gcc-12/0006-Patch-testsuite-Allow-MicroBlaze-.weakext-pattern-in.patch
+++ b/meta-microblaze/recipes-devtools/gcc/gcc-13/0006-Allow-MicroBlaze-.weakext-pattern-in-regex-match-Ext.patch
@@ -1,9 +1,9 @@
-From 20b6479f240bfebb46daad06839286a7abcff56c Mon Sep 17 00:00:00 2001
+From 7b07ae9c8086973b7baa031b09889146057de8ab Mon Sep 17 00:00:00 2001
 From: Mahesh Bodapati <mbodapat@xilinx.com>
 Date: Thu, 12 Jan 2017 16:14:15 +0530
-Subject: [PATCH 06/53] [Patch, testsuite]: Allow MicroBlaze .weakext pattern
- in regex match Extend regex pattern to include optional ext at the end of
- .weak to match the MicroBlaze weak label .weakext
+Subject: [PATCH 06/54] Allow MicroBlaze .weakext pattern in regex match Extend
+ regex pattern to include optional ext at the end of .weak to match the
+ MicroBlaze weak label .weakext
 
 ChangeLog/testsuite
 
@@ -63,5 +63,5 @@ index 6e8f124bc5e..d1d34fe1e4a 100644
  
  struct Base 
 -- 
-2.37.1 (Apple Git-137.1)
+2.34.1
 
diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-12/0007-Patch-testsuite-Add-MicroBlaze-to-check_profiling_av.patch b/meta-microblaze/recipes-devtools/gcc/gcc-13/0007-Add-MicroBlaze-to-check_profiling_available-Testsuit.patch
index 736f5cd1..5de0bfd8 100644
--- a/meta-microblaze/recipes-devtools/gcc/gcc-12/0007-Patch-testsuite-Add-MicroBlaze-to-check_profiling_av.patch
+++ b/meta-microblaze/recipes-devtools/gcc/gcc-13/0007-Add-MicroBlaze-to-check_profiling_available-Testsuit.patch
@@ -1,10 +1,9 @@
-From 0efefd8ac71dd084c745402afdf07319de9774c6 Mon Sep 17 00:00:00 2001
+From 6de628ecccf3739891052a2fbaf97048384c6190 Mon Sep 17 00:00:00 2001
 From: Mahesh Bodapati <mbodapat@xilinx.com>
 Date: Thu, 12 Jan 2017 16:34:27 +0530
-Subject: [PATCH 07/53] [Patch, testsuite]: Add MicroBlaze to
- check_profiling_available Testsuite, add microblaze*-*-* target in
- check_profiling_available inline with other archs setting
- profiling_available_saved to 0
+Subject: [PATCH 07/54] Add MicroBlaze to check_profiling_available Testsuite,
+ add microblaze*-*-* target in check_profiling_available inline with other
+ archs setting profiling_available_saved to 0
 
 Signed-off-by: David Holsgrove <david.holsgrove@xilinx.com>
 ---
@@ -12,10 +11,10 @@ Signed-off-by: David Holsgrove <david.holsgrove@xilinx.com>
  1 file changed, 1 insertion(+)
 
 diff --git a/gcc/testsuite/lib/target-supports.exp b/gcc/testsuite/lib/target-supports.exp
-index c19f251f0d2..c136c93e673 100644
+index 32e29706fcd..47233563339 100644
 --- a/gcc/testsuite/lib/target-supports.exp
 +++ b/gcc/testsuite/lib/target-supports.exp
-@@ -729,6 +729,7 @@ proc check_profiling_available { test_what } {
+@@ -804,6 +804,7 @@ proc check_profiling_available { test_what } {
              || [istarget m68k-*-elf]
              || [istarget m68k-*-uclinux*]
              || [istarget mips*-*-elf*]
@@ -24,5 +23,5 @@ index c19f251f0d2..c136c93e673 100644
              || [istarget mn10300-*-elf*]
              || [istarget moxie-*-elf*]
 -- 
-2.37.1 (Apple Git-137.1)
+2.34.1
 
diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-12/0008-Patch-microblaze-Fix-atomic-side-effects.patch b/meta-microblaze/recipes-devtools/gcc/gcc-13/0008-Fix-atomic-side-effects.-In-atomic_compare_and_swaps.patch
index 451070c0..e554e660 100644
--- a/meta-microblaze/recipes-devtools/gcc/gcc-12/0008-Patch-microblaze-Fix-atomic-side-effects.patch
+++ b/meta-microblaze/recipes-devtools/gcc/gcc-13/0008-Fix-atomic-side-effects.-In-atomic_compare_and_swaps.patch
@@ -1,11 +1,10 @@
-From 42ab0f7a2e6834feed456d00b3e2ec0ae2532a41 Mon Sep 17 00:00:00 2001
+From cd3db73d253df229054863e5f920e59e60b84c45 Mon Sep 17 00:00:00 2001
 From: Mahesh Bodapati <mbodapat@xilinx.com>
 Date: Thu, 12 Jan 2017 16:41:43 +0530
-Subject: [PATCH 08/53] [Patch, microblaze]: Fix atomic side effects. In
- atomic_compare_and_swapsi, add side effects to prevent incorrect assumptions
- during optimization. Previously, the outputs were considered unused; this
- generated assembly code with undefined side effects after invocation of the
- atomic.
+Subject: [PATCH 08/54] Fix atomic side effects. In atomic_compare_and_swapsi,
+ add side effects to prevent incorrect assumptions during optimization.
+ Previously, the outputs were considered unused; this generated assembly code
+ with undefined side effects after invocation of the atomic.
 
 Signed-off-by: Kirk Meyer <kirk.meyer@sencore.com>
 Signed-off-by: David Holsgrove <david.holsgrove@xilinx.com>
@@ -18,7 +17,7 @@ Conflicts:
  2 files changed, 16 insertions(+), 8 deletions(-)
 
 diff --git a/gcc/config/microblaze/microblaze.md b/gcc/config/microblaze/microblaze.md
-index 0765ff930c6..ea7f74f1dff 100644
+index 671667b537c..dfd7395432b 100644
 --- a/gcc/config/microblaze/microblaze.md
 +++ b/gcc/config/microblaze/microblaze.md
 @@ -43,6 +43,9 @@
@@ -32,7 +31,7 @@ index 0765ff930c6..ea7f74f1dff 100644
  
  (define_c_enum "unspec" [
 diff --git a/gcc/config/microblaze/sync.md b/gcc/config/microblaze/sync.md
-index ae8955ce691..77c3ce8ff27 100644
+index c84bac94101..587f852b3a0 100644
 --- a/gcc/config/microblaze/sync.md
 +++ b/gcc/config/microblaze/sync.md
 @@ -18,14 +18,19 @@
@@ -64,5 +63,5 @@ index ae8955ce691..77c3ce8ff27 100644
    ""
    {
 -- 
-2.37.1 (Apple Git-137.1)
+2.34.1
 
diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-12/0009-Patch-microblaze-Fix-atomic-boolean-return-value.patch b/meta-microblaze/recipes-devtools/gcc/gcc-13/0009-Fix-atomic-boolean-return-value.-In-atomic_compare_a.patch
index c7efbb07..617b10f3 100644
--- a/meta-microblaze/recipes-devtools/gcc/gcc-12/0009-Patch-microblaze-Fix-atomic-boolean-return-value.patch
+++ b/meta-microblaze/recipes-devtools/gcc/gcc-13/0009-Fix-atomic-boolean-return-value.-In-atomic_compare_a.patch
@@ -1,9 +1,9 @@
-From a1b8136a157c549f0f65c14d628e694310ca0d23 Mon Sep 17 00:00:00 2001
+From 7eca0d5cf7bc603c5a359b70521861c11faf6038 Mon Sep 17 00:00:00 2001
 From: Mahesh Bodapati <mbodapat@xilinx.com>
 Date: Thu, 12 Jan 2017 16:45:45 +0530
-Subject: [PATCH 09/53] [Patch, microblaze]: Fix atomic boolean return value.
- In atomic_compare_and_swapsi, fix boolean return value. Previously, it
- contained zero if successful and non-zero if unsuccessful.
+Subject: [PATCH 09/54] Fix atomic boolean return value. In
+ atomic_compare_and_swapsi, fix boolean return value. Previously, it contained
+ zero if successful and non-zero if unsuccessful.
 
 Signed-off-by: Kirk Meyer <kirk.meyer@sencore.com>
 Signed-off-by: David Holsgrove <david.holsgrove@xilinx.com>
@@ -12,7 +12,7 @@ Signed-off-by: David Holsgrove <david.holsgrove@xilinx.com>
  1 file changed, 4 insertions(+), 3 deletions(-)
 
 diff --git a/gcc/config/microblaze/sync.md b/gcc/config/microblaze/sync.md
-index 77c3ce8ff27..573ce4765a0 100644
+index 587f852b3a0..230699bf280 100644
 --- a/gcc/config/microblaze/sync.md
 +++ b/gcc/config/microblaze/sync.md
 @@ -34,15 +34,16 @@
@@ -36,5 +36,5 @@ index 77c3ce8ff27..573ce4765a0 100644
    }
  )
 -- 
-2.37.1 (Apple Git-137.1)
+2.34.1
 
diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-12/0010-Patch-microblaze-Fix-the-Microblaze-crash-with-msmal.patch b/meta-microblaze/recipes-devtools/gcc/gcc-13/0010-Fix-the-Microblaze-crash-with-msmall-divides-flag-Co.patch
index 1bffafa9..42b9d575 100644
--- a/meta-microblaze/recipes-devtools/gcc/gcc-12/0010-Patch-microblaze-Fix-the-Microblaze-crash-with-msmal.patch
+++ b/meta-microblaze/recipes-devtools/gcc/gcc-13/0010-Fix-the-Microblaze-crash-with-msmall-divides-flag-Co.patch
@@ -1,13 +1,12 @@
-From 1ab5b8af098d100a1d7af05cca680b3c7181549d Mon Sep 17 00:00:00 2001
+From 72cdba90d70131c092918c5d5c18eb800f0f9dfb Mon Sep 17 00:00:00 2001
 From: Mahesh Bodapati <mbodapat@xilinx.com>
 Date: Thu, 12 Jan 2017 16:50:17 +0530
-Subject: [PATCH 10/53] [Patch, microblaze]: Fix the Microblaze crash with
- msmall-divides flag Compiler is crashing when we use msmall-divides and
- mxl-barrel-shift flag. This is because when use above flags
- microblaze_expand_divide function will be called for division operation. In
- microblaze_expand_divide function we are using sub_reg but MicroBlaze doesn't
- have subreg register due to this compiler was crashing. Changed the logic to
- avoid sub_reg call
+Subject: [PATCH 10/54] Fix the Microblaze crash with msmall-divides flag
+ Compiler is crashing when we use msmall-divides and mxl-barrel-shift flag.
+ This is because when use above flags microblaze_expand_divide function will
+ be called for division operation. In microblaze_expand_divide function we are
+ using sub_reg but MicroBlaze doesn't have subreg register due to this
+ compiler was crashing. Changed the logic to avoid sub_reg call
 
 Signed-off-by:Nagaraju Mekala <nmekala@xilix.com>
 
@@ -18,10 +17,10 @@ Conflicts:
  1 file changed, 1 insertion(+), 2 deletions(-)
 
 diff --git a/gcc/config/microblaze/microblaze.cc b/gcc/config/microblaze/microblaze.cc
-index f32effecfb6..6922dd94af7 100644
+index 6df2c712cab..11e34b3fdae 100644
 --- a/gcc/config/microblaze/microblaze.cc
 +++ b/gcc/config/microblaze/microblaze.cc
-@@ -3710,8 +3710,7 @@ microblaze_expand_divide (rtx operands[])
+@@ -3719,8 +3719,7 @@ microblaze_expand_divide (rtx operands[])
    mem_rtx = gen_rtx_MEM (QImode,
                              gen_rtx_PLUS (Pmode, regt1, div_table_rtx));
  
@@ -32,5 +31,5 @@ index f32effecfb6..6922dd94af7 100644
    JUMP_LABEL (jump) = div_end_label;
    LABEL_NUSES (div_end_label) = 1; 
 -- 
-2.37.1 (Apple Git-137.1)
+2.34.1
 
diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-12/0011-Patch-microblaze-Added-ashrsi3_with_size_opt.patch b/meta-microblaze/recipes-devtools/gcc/gcc-13/0011-Added-ashrsi3_with_size_opt-Added-ashrsi3_with_size_.patch
index 1bd73b8a..8988e23b 100644
--- a/meta-microblaze/recipes-devtools/gcc/gcc-12/0011-Patch-microblaze-Added-ashrsi3_with_size_opt.patch
+++ b/meta-microblaze/recipes-devtools/gcc/gcc-13/0011-Added-ashrsi3_with_size_opt-Added-ashrsi3_with_size_.patch
@@ -1,10 +1,10 @@
-From 7dd4ae2ad891094aa85a907b168cbdce744789e9 Mon Sep 17 00:00:00 2001
+From 41d8b3677d64bf9408925667c103a04b176050d5 Mon Sep 17 00:00:00 2001
 From: Mahesh Bodapati <mbodapat@xilinx.com>
 Date: Thu, 12 Jan 2017 16:52:56 +0530
-Subject: [PATCH 11/53] [Patch, microblaze]: Added ashrsi3_with_size_opt Added
- ashrsi3_with_size_opt pattern to optimize the sra instructions when the -Os
- optimization is used. lshrsi3_with_size_opt is being removed as it has
- conflicts with unsigned int variables
+Subject: [PATCH 11/54] Added ashrsi3_with_size_opt Added ashrsi3_with_size_opt
+ pattern to optimize the sra instructions when the -Os optimization is used.
+ lshrsi3_with_size_opt is being removed as it has conflicts with unsigned int
+ variables
 
 Signed-off-by:Nagaraju Mekala <nmekala@xilix.com>
 ---
@@ -12,7 +12,7 @@ Signed-off-by:Nagaraju Mekala <nmekala@xilix.com>
  1 file changed, 21 insertions(+)
 
 diff --git a/gcc/config/microblaze/microblaze.md b/gcc/config/microblaze/microblaze.md
-index ea7f74f1dff..9fbb3113f3c 100644
+index dfd7395432b..4f20b8efe33 100644
 --- a/gcc/config/microblaze/microblaze.md
 +++ b/gcc/config/microblaze/microblaze.md
 @@ -1508,6 +1508,27 @@
@@ -44,5 +44,5 @@ index ea7f74f1dff..9fbb3113f3c 100644
    [(set (match_operand:SI 0 "register_operand" "=&d")
         (ashiftrt:SI (match_operand:SI 1 "register_operand"  "d")
 -- 
-2.37.1 (Apple Git-137.1)
+2.34.1
 
diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-12/0012-Patch-microblaze-Use-bralid-for-profiler-calls.patch b/meta-microblaze/recipes-devtools/gcc/gcc-13/0012-Use-bralid-for-profiler-calls-Signed-off-by-Edgar-E..patch
index f40fff9a..46a8699a 100644
--- a/meta-microblaze/recipes-devtools/gcc/gcc-12/0012-Patch-microblaze-Use-bralid-for-profiler-calls.patch
+++ b/meta-microblaze/recipes-devtools/gcc/gcc-13/0012-Use-bralid-for-profiler-calls-Signed-off-by-Edgar-E..patch
@@ -1,15 +1,15 @@
-From 12d7e086376916ef61e2c48639671fd0f7c8fbbf Mon Sep 17 00:00:00 2001
+From 9dc1f7291c4c7abfe254ca4e86a6ba0975a74960 Mon Sep 17 00:00:00 2001
 From: Mahesh Bodapati <mbodapat@xilinx.com>
 Date: Tue, 17 Jan 2017 10:57:19 +0530
-Subject: [PATCH 12/53] [Patch, microblaze]: Use bralid for profiler calls
- Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
+Subject: [PATCH 12/54] Use bralid for profiler calls Signed-off-by: Edgar E.
+ Iglesias <edgar.iglesias@gmail.com>
 
 ---
  gcc/config/microblaze/microblaze.h | 2 +-
  1 file changed, 1 insertion(+), 1 deletion(-)
 
 diff --git a/gcc/config/microblaze/microblaze.h b/gcc/config/microblaze/microblaze.h
-index d28bc766de8..cd544f2030e 100644
+index 0398902362b..49e7fbedd5a 100644
 --- a/gcc/config/microblaze/microblaze.h
 +++ b/gcc/config/microblaze/microblaze.h
 @@ -486,7 +486,7 @@ typedef struct microblaze_args
@@ -22,5 +22,5 @@ index d28bc766de8..cd544f2030e 100644
   }
  
 -- 
-2.37.1 (Apple Git-137.1)
+2.34.1
 
diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-12/0013-Patch-microblaze-Removed-moddi3-routinue.patch b/meta-microblaze/recipes-devtools/gcc/gcc-13/0013-Removed-moddi3-routinue-Using-the-default-moddi3-fun.patch
index 5c927264..26c24a49 100644
--- a/meta-microblaze/recipes-devtools/gcc/gcc-12/0013-Patch-microblaze-Removed-moddi3-routinue.patch
+++ b/meta-microblaze/recipes-devtools/gcc/gcc-13/0013-Removed-moddi3-routinue-Using-the-default-moddi3-fun.patch
@@ -1,8 +1,8 @@
-From cd8c9f3c43b266628d1585b74fc78f3e34a33c44 Mon Sep 17 00:00:00 2001
+From a2dbb662c573d2bf1a6a9192eb0d7f453ad20c59 Mon Sep 17 00:00:00 2001
 From: Mahesh Bodapati <mbodapat@xilinx.com>
 Date: Thu, 12 Jan 2017 17:36:16 +0530
-Subject: [PATCH 13/53] [Patch, microblaze]: Removed moddi3 routinue Using the
- default moddi3 function as the existing implementation has many bugs
+Subject: [PATCH 13/54] Removed moddi3 routinue Using the default moddi3
+ function as the existing implementation has many bugs
 
 Signed-off-by:Nagaraju <nmekala@xilix.com>
 
@@ -16,13 +16,13 @@ Conflicts:
 
 diff --git a/libgcc/config/microblaze/moddi3.S b/libgcc/config/microblaze/moddi3.S
 deleted file mode 100644
-index 9b77865df38..00000000000
+index b3e4bf6182e..00000000000
 --- a/libgcc/config/microblaze/moddi3.S
 +++ /dev/null
 @@ -1,121 +0,0 @@
 -###################################
 -# 
--#  Copyright (C) 2009-2022 Free Software Foundation, Inc.
+-#  Copyright (C) 2009-2023 Free Software Foundation, Inc.
 -#
 -#  Contributed by Michael Eager <eager@eagercon.com>.
 -#
@@ -156,5 +156,5 @@ index 96959f0292b..8d954a49575 100644
          $(srcdir)/config/microblaze/muldi3_hard.S \
          $(srcdir)/config/microblaze/mulsi3.S \
 -- 
-2.37.1 (Apple Git-137.1)
+2.34.1
 
diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-12/0014-Patch-microblaze-Add-INIT_PRIORITY-support-Added.patch b/meta-microblaze/recipes-devtools/gcc/gcc-13/0014-Add-INIT_PRIORITY-support-Added-TARGET_ASM_CONSTRUCT.patch
index f8bcabe3..9e4348ad 100644
--- a/meta-microblaze/recipes-devtools/gcc/gcc-12/0014-Patch-microblaze-Add-INIT_PRIORITY-support-Added.patch
+++ b/meta-microblaze/recipes-devtools/gcc/gcc-13/0014-Add-INIT_PRIORITY-support-Added-TARGET_ASM_CONSTRUCT.patch
@@ -1,8 +1,8 @@
-From 30aa7cef2dd076637155384fba539838ddaf0163 Mon Sep 17 00:00:00 2001
+From 40dd974a6cd608567f1746a934c9743b80ca1e3f Mon Sep 17 00:00:00 2001
 From: Mahesh Bodapati <mbodapat@xilinx.com>
 Date: Mon, 12 Sep 2022 20:20:00 +0530
-Subject: [PATCH 14/53] [Patch, microblaze]: Add INIT_PRIORITY support Added 
- TARGET_ASM_CONSTRUCTOR and TARGET_ASM_DESTRUCTOR macros.
+Subject: [PATCH 14/54] Add INIT_PRIORITY support Added TARGET_ASM_CONSTRUCTOR
+ and TARGET_ASM_DESTRUCTOR macros.
 
 These macros allows users to control the order of initialization
 of objects defined at namespace scope with the init_priority
@@ -15,10 +15,10 @@ Lower numbers indicate a higher priority.
  1 file changed, 53 insertions(+)
 
 diff --git a/gcc/config/microblaze/microblaze.cc b/gcc/config/microblaze/microblaze.cc
-index 6922dd94af7..4b0621db168 100644
+index 11e34b3fdae..3fb402b87d4 100644
 --- a/gcc/config/microblaze/microblaze.cc
 +++ b/gcc/config/microblaze/microblaze.cc
-@@ -2635,6 +2635,53 @@ print_operand_address (FILE * file, rtx addr)
+@@ -2640,6 +2640,53 @@ print_operand_address (FILE * file, rtx addr)
      }
  }
  
@@ -72,7 +72,7 @@ index 6922dd94af7..4b0621db168 100644
  /* Emit either a label, .comm, or .lcomm directive, and mark that the symbol
     is used, so that we don't emit an .extern for it in 
     microblaze_asm_file_end.  */
-@@ -3976,6 +4023,12 @@ microblaze_starting_frame_offset (void)
+@@ -3985,6 +4032,12 @@ microblaze_starting_frame_offset (void)
  #undef TARGET_ATTRIBUTE_TABLE
  #define TARGET_ATTRIBUTE_TABLE          microblaze_attribute_table
  
@@ -86,5 +86,5 @@ index 6922dd94af7..4b0621db168 100644
  #define TARGET_IN_SMALL_DATA_P          microblaze_elf_in_small_data_p
  
 -- 
-2.37.1 (Apple Git-137.1)
+2.34.1
 
diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-12/0015-Patch-microblaze-Add-optimized-lshrsi3.patch b/meta-microblaze/recipes-devtools/gcc/gcc-13/0015-Add-optimized-lshrsi3-When-barrel-shifter-is-not-pre.patch
index 0f7d356f..fac95b7b 100644
--- a/meta-microblaze/recipes-devtools/gcc/gcc-12/0015-Patch-microblaze-Add-optimized-lshrsi3.patch
+++ b/meta-microblaze/recipes-devtools/gcc/gcc-13/0015-Add-optimized-lshrsi3-When-barrel-shifter-is-not-pre.patch
@@ -1,9 +1,9 @@
-From b9bb669d9404bd04676f09c793310e1b7f228674 Mon Sep 17 00:00:00 2001
+From d0f1a493d130e06816df4d11f31421a8691761e0 Mon Sep 17 00:00:00 2001
 From: Mahesh Bodapati <mbodapat@xilinx.com>
 Date: Tue, 17 Jan 2017 15:23:57 +0530
-Subject: [PATCH 15/53] [Patch, microblaze]: Add optimized lshrsi3 When barrel
- shifter is not present, the immediate value is greater than #5 and
- optimization is -OS, the compiler will generate shift operation using loop.
+Subject: [PATCH 15/54] Add optimized lshrsi3 When barrel shifter is not
+ present, the immediate value is greater than #5 and optimization is -OS, the
+ compiler will generate shift operation using loop.
 
 Changelog
 
@@ -26,7 +26,7 @@ Signed-off-by: David Holsgrove <david.holsgrove@xilinx.com>
  create mode 100644 gcc/testsuite/gcc.target/microblaze/others/lshrsi_Os_1.c
 
 diff --git a/gcc/config/microblaze/microblaze.md b/gcc/config/microblaze/microblaze.md
-index 9fbb3113f3c..52308cce0cb 100644
+index 4f20b8efe33..5d65ad84449 100644
 --- a/gcc/config/microblaze/microblaze.md
 +++ b/gcc/config/microblaze/microblaze.md
 @@ -1618,6 +1618,27 @@
@@ -77,5 +77,5 @@ index 00000000000..32a3be7c76a
 +/* { dg-final { scan-assembler "bneid\tr18,.-4" } } */
 +/* { dg-final { scan-assembler "\srl\tr(\[0-9]\|\[1-2]\[0-9]\|3\[0-1]),r(\[0-9]\|\[1-2]\[0-9]\|3\[0-1])" } } */
 -- 
-2.37.1 (Apple Git-137.1)
+2.34.1
 
diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-12/0016-Patch-microblaze-Add-cbranchsi4_reg.patch b/meta-microblaze/recipes-devtools/gcc/gcc-13/0016-Add-cbranchsi4_reg-This-patch-optimizes-the-generati.patch
index 19ae324d..298765dc 100644
--- a/meta-microblaze/recipes-devtools/gcc/gcc-12/0016-Patch-microblaze-Add-cbranchsi4_reg.patch
+++ b/meta-microblaze/recipes-devtools/gcc/gcc-13/0016-Add-cbranchsi4_reg-This-patch-optimizes-the-generati.patch
@@ -1,10 +1,9 @@
-From 08d7bb4062024f3e34fbb17d695f8fa2c9e1b305 Mon Sep 17 00:00:00 2001
+From e94d406c9fa0d7b99532bd8cf4b2a4580cdb02b7 Mon Sep 17 00:00:00 2001
 From: Mahesh Bodapati <mbodapat@xilinx.com>
 Date: Tue, 17 Jan 2017 17:04:37 +0530
-Subject: [PATCH 16/53] [Patch, microblaze]: Add cbranchsi4_reg This patch
- optimizes the generation of  pcmpne/pcmpeq instruction if the compare
- instruction has no immediate values.For the immediate values the xor
- instruction is generated
+Subject: [PATCH 16/54] Add cbranchsi4_reg This patch optimizes the generation
+ of pcmpne/pcmpeq instruction if the compare instruction has no immediate
+ values.For the immediate values the xor instruction is generated
 
 Signed-off-by: Nagaraju Mekala <nmekala@xilix.com>
 Signed-off-by: Ajit Agarwal  <ajitkum@xilinx.com>
@@ -30,7 +29,7 @@ Conflicts:
  7 files changed, 18 insertions(+), 18 deletions(-)
 
 diff --git a/gcc/config/microblaze/microblaze-protos.h b/gcc/config/microblaze/microblaze-protos.h
-index d67355697b5..848cd509003 100644
+index 31a6515176b..41557af0f3c 100644
 --- a/gcc/config/microblaze/microblaze-protos.h
 +++ b/gcc/config/microblaze/microblaze-protos.h
 @@ -33,7 +33,7 @@ extern int microblaze_expand_shift (rtx *);
@@ -143,5 +142,5 @@ index 1d6ba807b12..532c035adfd 100644
      
  }
 -- 
-2.37.1 (Apple Git-137.1)
+2.34.1
 
diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-12/0017-Patch-microblaze-Inline-Expansion-of-fsqrt-builtin.patch b/meta-microblaze/recipes-devtools/gcc/gcc-13/0017-Inline-Expansion-of-fsqrt-builtin.-The-changes-are-m.patch
index e3a98a08..91ca87fc 100644
--- a/meta-microblaze/recipes-devtools/gcc/gcc-12/0017-Patch-microblaze-Inline-Expansion-of-fsqrt-builtin.patch
+++ b/meta-microblaze/recipes-devtools/gcc/gcc-13/0017-Inline-Expansion-of-fsqrt-builtin.-The-changes-are-m.patch
@@ -1,19 +1,19 @@
-From 1593e5a9839b7cade95e9f55ba3cff66d64d0e84 Mon Sep 17 00:00:00 2001
+From 0760cd661f6c09cda8327288f79314319a0b9b14 Mon Sep 17 00:00:00 2001
 From: Mahesh Bodapati <mbodapat@xilinx.com>
 Date: Tue, 17 Jan 2017 17:11:04 +0530
-Subject: [PATCH 17/53] [Patch,microblaze]: Inline Expansion of fsqrt builtin.
- The changes are made in the patch for the inline expansion of the fsqrt
- builtin with fqrt instruction. The sqrt math function takes double as
- argument and return double as argument. The pattern is selected while
- expanding the unary op through expand_unop which passes DFmode and the DFmode
- pattern was not there returning zero. Thus the sqrt math function is not
- inlined and expanded. The pattern with DFmode argument is added. Also the
- source and destination argument is not same the DF through two different
- consecutive registers with lower 32 bit is the argument passed to sqrt and
- the higher 32 bit is zero. If the source and destinations are different the
- DFmode 64 bits registers is not set properly giving the problem in runtime.
- Such changes are taken care in the implementation of the pattern for DFmode
- for inline expansion of the sqrt.
+Subject: [PATCH 17/54] Inline Expansion of fsqrt builtin. The changes are made
+ in the patch for the inline expansion of the fsqrt builtin with fqrt
+ instruction. The sqrt math function takes double as argument and return
+ double as argument. The pattern is selected while expanding the unary op
+ through expand_unop which passes DFmode and the DFmode pattern was not there
+ returning zero. Thus the sqrt math function is not inlined and expanded. The
+ pattern with DFmode argument is added. Also the source and destination
+ argument is not same the DF through two different consecutive registers with
+ lower 32 bit is the argument passed to sqrt and the higher 32 bit is zero. If
+ the source and destinations are different the DFmode 64 bits registers is not
+ set properly giving the problem in runtime. Such changes are taken care in
+ the implementation of the pattern for DFmode for inline expansion of the
+ sqrt.
 
 ChangeLog:
 2015-06-16  Ajit Agarwal  <ajitkum@xilinx.com>
@@ -29,7 +29,7 @@ Signed-off-by:Ajit Agarwal ajitkum@xilinx.com
  1 file changed, 14 insertions(+)
 
 diff --git a/gcc/config/microblaze/microblaze.md b/gcc/config/microblaze/microblaze.md
-index 52308cce0cb..0e5ef4d7649 100644
+index 5d65ad84449..0597ed8d75a 100644
 --- a/gcc/config/microblaze/microblaze.md
 +++ b/gcc/config/microblaze/microblaze.md
 @@ -451,6 +451,20 @@
@@ -54,5 +54,5 @@ index 52308cce0cb..0e5ef4d7649 100644
    [(set (match_operand:SI 0 "register_operand" "=d")
          (fix:SI (match_operand:SF 1 "register_operand" "d")))]
 -- 
-2.37.1 (Apple Git-137.1)
+2.34.1
 
diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-12/0018-PATCH-microblaze.md-Improve-adddi3-and-subdi3-insn-d.patch b/meta-microblaze/recipes-devtools/gcc/gcc-13/0018-microblaze.md-Improve-adddi3-and-subdi3-insn-definit.patch
index 831b8f22..f388e9b5 100644
--- a/meta-microblaze/recipes-devtools/gcc/gcc-12/0018-PATCH-microblaze.md-Improve-adddi3-and-subdi3-insn-d.patch
+++ b/meta-microblaze/recipes-devtools/gcc/gcc-13/0018-microblaze.md-Improve-adddi3-and-subdi3-insn-definit.patch
@@ -1,9 +1,9 @@
-From 9002b7d4c295bef95a3fc28c05f86dde5087dde1 Mon Sep 17 00:00:00 2001
+From 0a7299e82a8f463e9e7cd6297c5bdc0aac3a0ec4 Mon Sep 17 00:00:00 2001
 From: Mahesh Bodapati <mbodapat@xilinx.com>
 Date: Tue, 17 Jan 2017 18:07:24 +0530
-Subject: [PATCH 18/53] [PATCH] microblaze.md: Improve 'adddi3' and 'subdi3'
- insn definitions Change adddi3 to handle DI immediates as the second operand,
- this requires modification to the output template however reduces the need to
+Subject: [PATCH 18/54] microblaze.md: Improve 'adddi3' and 'subdi3' insn
+ definitions Change adddi3 to handle DI immediates as the second operand, this
+ requires modification to the output template however reduces the need to
  specify seperate templates for 16-bit positive/negative immediate operands.
  The use of 32-bit immediates for the addi and addic instructions is handled
  by the assembler, which will emit the imm instructions when required. This
@@ -23,7 +23,7 @@ Signed-off-by: Nathan Rossi <nathan@nathanrossi.com>
  1 file changed, 6 insertions(+), 7 deletions(-)
 
 diff --git a/gcc/config/microblaze/microblaze.md b/gcc/config/microblaze/microblaze.md
-index 0e5ef4d7649..effb9774c32 100644
+index 0597ed8d75a..498926a4a75 100644
 --- a/gcc/config/microblaze/microblaze.md
 +++ b/gcc/config/microblaze/microblaze.md
 @@ -502,17 +502,16 @@
@@ -59,5 +59,5 @@ index 0e5ef4d7649..effb9774c32 100644
    "rsub\t%L0,%L2,%L1\;rsubc\t%M0,%M2,%M1"
    [(set_attr "type"    "darith")
 -- 
-2.37.1 (Apple Git-137.1)
+2.34.1
 
diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-12/0019-Patch-microblaze-Update-ashlsi3-movsf-patterns.patch b/meta-microblaze/recipes-devtools/gcc/gcc-13/0019-Update-ashlsi3-movsf-patterns-This-patch-removes-the.patch
index ab3fa535..0f388f70 100644
--- a/meta-microblaze/recipes-devtools/gcc/gcc-12/0019-Patch-microblaze-Update-ashlsi3-movsf-patterns.patch
+++ b/meta-microblaze/recipes-devtools/gcc/gcc-13/0019-Update-ashlsi3-movsf-patterns-This-patch-removes-the.patch
@@ -1,10 +1,10 @@
-From ef94a8b2110f5a3becefb00c1f7c0c3adac6fcac Mon Sep 17 00:00:00 2001
+From a969ab3f04de077eca6d928dd651e3c6b042367d Mon Sep 17 00:00:00 2001
 From: Mahesh Bodapati <mbodapat@xilinx.com>
 Date: Tue, 17 Jan 2017 18:18:41 +0530
-Subject: [PATCH 19/53] [Patch, microblaze]: Update ashlsi3 & movsf patterns
- This patch removes the use of HOST_WIDE_INT_PRINT_HEX macro in print_operand
- of ashlsi3_with_mul_nodelay,ashlsi3_with_mul_delay and movsf_internal
- patterns beacuse HOST_WIDE_INT_PRINT_HEX is generating 64-bit value which our
+Subject: [PATCH 19/54] Update ashlsi3 & movsf patterns This patch removes the
+ use of HOST_WIDE_INT_PRINT_HEX macro in print_operand of
+ ashlsi3_with_mul_nodelay,ashlsi3_with_mul_delay and movsf_internal patterns
+ beacuse HOST_WIDE_INT_PRINT_HEX is generating 64-bit value which our
  instruction doesn't support so using gen_int_mode function
 
 Signed-off-by :Nagaraju Mekala <nmekala@xilix.com>
@@ -30,10 +30,10 @@ Conflicts:
  2 files changed, 9 insertions(+), 3 deletions(-)
 
 diff --git a/gcc/config/microblaze/microblaze.cc b/gcc/config/microblaze/microblaze.cc
-index 4b0621db168..c23061c4e4a 100644
+index 3fb402b87d4..ff64e0ca342 100644
 --- a/gcc/config/microblaze/microblaze.cc
 +++ b/gcc/config/microblaze/microblaze.cc
-@@ -2469,7 +2469,7 @@ print_operand (FILE * file, rtx op, int letter)
+@@ -2474,7 +2474,7 @@ print_operand (FILE * file, rtx op, int letter)
           unsigned long value_long;
           REAL_VALUE_TO_TARGET_SINGLE (*CONST_DOUBLE_REAL_VALUE (op),
                                        value_long);
@@ -43,7 +43,7 @@ index 4b0621db168..c23061c4e4a 100644
        else
         {
 diff --git a/gcc/config/microblaze/microblaze.md b/gcc/config/microblaze/microblaze.md
-index effb9774c32..a4d7ea29219 100644
+index 498926a4a75..0448101de8a 100644
 --- a/gcc/config/microblaze/microblaze.md
 +++ b/gcc/config/microblaze/microblaze.md
 @@ -1368,7 +1368,10 @@
@@ -71,5 +71,5 @@ index effb9774c32..a4d7ea29219 100644
    [(set_attr "type"    "no_delay_arith")
     (set_attr "mode"    "SI")
 -- 
-2.37.1 (Apple Git-137.1)
+2.34.1
 
diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-12/0020-Patch-microblaze-8-stage-pipeline-for-microblaze.patch b/meta-microblaze/recipes-devtools/gcc/gcc-13/0020-8-stage-pipeline-for-microblaze-This-patch-adds-the-.patch
index 67eb0893..002e60be 100644
--- a/meta-microblaze/recipes-devtools/gcc/gcc-12/0020-Patch-microblaze-8-stage-pipeline-for-microblaze.patch
+++ b/meta-microblaze/recipes-devtools/gcc/gcc-13/0020-8-stage-pipeline-for-microblaze-This-patch-adds-the-.patch
@@ -1,9 +1,9 @@
-From 65574bdca9006fda7654e33a0081eeecfcd9976b Mon Sep 17 00:00:00 2001
+From 21daca8e01515b2e73463adbf9488b63bb0ccf54 Mon Sep 17 00:00:00 2001
 From: Mahesh Bodapati <mbodapat@xilinx.com>
 Date: Mon, 12 Sep 2022 21:05:51 +0530
-Subject: [PATCH 20/53] [Patch, microblaze]: 8-stage pipeline for microblaze
- This patch adds the support for the 8-stage pipeline. The new 8-stage
- pipeline reduces the latencies of float & integer division drastically
+Subject: [PATCH 20/54] 8-stage pipeline for microblaze This patch adds the
+ support for the 8-stage pipeline. The new 8-stage pipeline reduces the
+ latencies of float & integer division drastically
 
 Signed-off-by :Nagaraju Mekala <nmekala@xilix.com>
 ---
@@ -14,10 +14,10 @@ Signed-off-by :Nagaraju Mekala <nmekala@xilix.com>
  4 files changed, 94 insertions(+), 3 deletions(-)
 
 diff --git a/gcc/config/microblaze/microblaze.cc b/gcc/config/microblaze/microblaze.cc
-index c23061c4e4a..bd394c411b8 100644
+index ff64e0ca342..a58a5b2a1b0 100644
 --- a/gcc/config/microblaze/microblaze.cc
 +++ b/gcc/config/microblaze/microblaze.cc
-@@ -1841,6 +1841,17 @@ microblaze_option_override (void)
+@@ -1846,6 +1846,17 @@ microblaze_option_override (void)
                    "%<-mcpu=v8.30.a%>");
          TARGET_REORDER = 0;
      }
@@ -36,7 +36,7 @@ index c23061c4e4a..bd394c411b8 100644
    if (TARGET_MULTIPLY_HIGH && TARGET_SOFT_MUL)
      error ("%<-mxl-multiply-high%> requires %<-mno-xl-soft-mul%>");
 diff --git a/gcc/config/microblaze/microblaze.h b/gcc/config/microblaze/microblaze.h
-index cd544f2030e..640ae6ea9a3 100644
+index 49e7fbedd5a..e4faa9c681f 100644
 --- a/gcc/config/microblaze/microblaze.h
 +++ b/gcc/config/microblaze/microblaze.h
 @@ -27,7 +27,8 @@
@@ -50,7 +50,7 @@ index cd544f2030e..640ae6ea9a3 100644
  
  #define MICROBLAZE_MASK_NO_UNSAFE_DELAY         0x00000001
 diff --git a/gcc/config/microblaze/microblaze.md b/gcc/config/microblaze/microblaze.md
-index a4d7ea29219..9e9dfb1ccb0 100644
+index 0448101de8a..7a01b28d8f0 100644
 --- a/gcc/config/microblaze/microblaze.md
 +++ b/gcc/config/microblaze/microblaze.md
 @@ -35,6 +35,7 @@
@@ -161,7 +161,7 @@ index a4d7ea29219..9e9dfb1ccb0 100644
    (set_attr "length"    "4")])
  
 diff --git a/gcc/config/microblaze/microblaze.opt b/gcc/config/microblaze/microblaze.opt
-index 9f47e67cf2a..cc009363f87 100644
+index dbf6390ef4b..37aaaf9ffda 100644
 --- a/gcc/config/microblaze/microblaze.opt
 +++ b/gcc/config/microblaze/microblaze.opt
 @@ -133,3 +133,7 @@ Data referenced by offset from start of text instead of GOT (with -fPIC/-fPIE).
@@ -173,5 +173,5 @@ index 9f47e67cf2a..cc009363f87 100644
 +Target Mask(AREA_OPTIMIZED_2)
 +Use 8 stage pipeline (frequency optimization)
 -- 
-2.37.1 (Apple Git-137.1)
+2.34.1
 
diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-12/0021-PATCH-21-53-Patch-microblaze-Correct-the-const-high-.patch b/meta-microblaze/recipes-devtools/gcc/gcc-13/0021-Correct-the-const-high-double-immediate-value-with-t.patch
index 96fe4f73..2e8182d1 100644
--- a/meta-microblaze/recipes-devtools/gcc/gcc-12/0021-PATCH-21-53-Patch-microblaze-Correct-the-const-high-.patch
+++ b/meta-microblaze/recipes-devtools/gcc/gcc-13/0021-Correct-the-const-high-double-immediate-value-with-t.patch
@@ -1,11 +1,11 @@
-From 1d56bfb436b008422b4a7d4d4e3180667130c840 Mon Sep 17 00:00:00 2001
+From 1cda2f5772650aa65853e6a3e9d8162498c2f469 Mon Sep 17 00:00:00 2001
 From: Mahesh Bodapati <mbodapat@xilinx.com>
 Date: Tue, 13 Sep 2022 11:49:11 +0530
-Subject: [PATCH 21/53] [PATCH 21/53] [Patch, microblaze]: Correct the const
- high double  immediate value with this patch the loading of the DI mode
- immediate values  will be using REAL_VALUE_FROM_CONST_DOUBLE and
- REAL_VALUE_TO_TARGET_DOUBLE  functions, as CONST_DOUBLE_HIGH was returning
- the sign extension value even  of the unsigned long long constants also
+Subject: [PATCH 21/54] Correct the const high double immediate value with this
+ patch the loading of the DI mode immediate values will be using
+ REAL_VALUE_FROM_CONST_DOUBLE and REAL_VALUE_TO_TARGET_DOUBLE functions, as
+ CONST_DOUBLE_HIGH was returning the sign extension value even of the unsigned
+ long long constants also
 
 Signed-off-by :Nagaraju Mekala <nmekala@xilix.com>
                Ajit Agarwal  <ajitkum@xilinx.com>
@@ -16,10 +16,10 @@ Signed-off-by :Nagaraju Mekala <nmekala@xilix.com>
  create mode 100644 gcc/testsuite/gcc.target/microblaze/others/long.c
 
 diff --git a/gcc/config/microblaze/microblaze.cc b/gcc/config/microblaze/microblaze.cc
-index bd394c411b8..7c648cda1b2 100644
+index a58a5b2a1b0..af5c2371740 100644
 --- a/gcc/config/microblaze/microblaze.cc
 +++ b/gcc/config/microblaze/microblaze.cc
-@@ -2453,14 +2453,16 @@ print_operand (FILE * file, rtx op, int letter)
+@@ -2458,14 +2458,16 @@ print_operand (FILE * file, rtx op, int letter)
    else if (letter == 'h' || letter == 'j')
      {
        long val[2];
@@ -54,5 +54,5 @@ index 00000000000..b6b55d5ad65
 +/* { dg-final { scan-assembler "addik\tr(\[0-9]\|\[1-2]\[0-9]\|3\[0-1]),r0,0x00000000" } } */
 +/* { dg-final { scan-assembler "addik\tr(\[0-9]\|\[1-2]\[0-9]\|3\[0-1]),r0,0xf0000000" } } */
 -- 
-2.37.1 (Apple Git-137.1)
+2.34.1
 
diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-12/0022-Fix-microblaze-Fix-internal-compiler-error-with-msma.patch b/meta-microblaze/recipes-devtools/gcc/gcc-13/0022-Fix-internal-compiler-error-with-msmall-divides-This.patch
index 332db5d3..599bd71e 100644
--- a/meta-microblaze/recipes-devtools/gcc/gcc-12/0022-Fix-microblaze-Fix-internal-compiler-error-with-msma.patch
+++ b/meta-microblaze/recipes-devtools/gcc/gcc-13/0022-Fix-internal-compiler-error-with-msmall-divides-This.patch
@@ -1,11 +1,11 @@
-From cd60ea1bd88ac47856ac66266a0771478ac73bad Mon Sep 17 00:00:00 2001
+From a88796930d8ef1b97056217ffdcc9f86326cdc98 Mon Sep 17 00:00:00 2001
 From: Mahesh Bodapati <mbodapat@xilinx.com>
 Date: Tue, 13 Sep 2022 11:58:14 +0530
-Subject: [PATCH 22/53] [Fix, microblaze]: Fix internal compiler error with
- msmall-divides     This patch will fix the internal error
- microblaze_expand_divide function which come     of rtx PLUS where the
- mem_rtx is of type SI and the operand is of type QImode.     This patch
- modifies the mem_rtx as QImode and Plus as QImode to fix the error.
+Subject: [PATCH 22/54] Fix internal compiler error with msmall-divides This
+ patch will fix the internal error microblaze_expand_divide function which
+ come of rtx PLUS where the mem_rtx is of type SI and the operand is of type
+ QImode. This patch modifies the mem_rtx as QImode and Plus as QImode to fix
+ the error.
 
     Signed-off-by :Nagaraju Mekala <nmekala@xilix.com>
                    Ajit Agarwal  <ajitkum@xilinx.com>
@@ -14,10 +14,10 @@ Subject: [PATCH 22/53] [Fix, microblaze]: Fix internal compiler error with
  1 file changed, 1 insertion(+), 1 deletion(-)
 
 diff --git a/gcc/config/microblaze/microblaze.cc b/gcc/config/microblaze/microblaze.cc
-index 7c648cda1b2..907c0afa9b8 100644
+index af5c2371740..4967d6a0133 100644
 --- a/gcc/config/microblaze/microblaze.cc
 +++ b/gcc/config/microblaze/microblaze.cc
-@@ -3768,7 +3768,7 @@ microblaze_expand_divide (rtx operands[])
+@@ -3777,7 +3777,7 @@ microblaze_expand_divide (rtx operands[])
    emit_insn (gen_ashlsi3_bshift (regt1, operands[1], GEN_INT(4)));
    emit_insn (gen_addsi3 (regt1, regt1, operands[2]));
    mem_rtx = gen_rtx_MEM (QImode,
@@ -27,5 +27,5 @@ index 7c648cda1b2..907c0afa9b8 100644
    insn = emit_insn (gen_zero_extendqisi2(operands[0],mem_rtx));
    jump = emit_jump_insn_after (gen_jump (div_end_label), insn); 
 -- 
-2.37.1 (Apple Git-137.1)
+2.34.1
 
diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-12/0023-patch-microblaze-Fix-the-calculation-of-high-word-in.patch b/meta-microblaze/recipes-devtools/gcc/gcc-13/0023-Fix-the-calculation-of-high-word-in-a-long-long-64-b.patch
index 47e13fa6..65f283ad 100644
--- a/meta-microblaze/recipes-devtools/gcc/gcc-12/0023-patch-microblaze-Fix-the-calculation-of-high-word-in.patch
+++ b/meta-microblaze/recipes-devtools/gcc/gcc-13/0023-Fix-the-calculation-of-high-word-in-a-long-long-64-b.patch
@@ -1,8 +1,7 @@
-From b98cddb206ce84994425ede4b116365977768e37 Mon Sep 17 00:00:00 2001
+From f9871617fe69a105ebc4aa4838c682bfe40e4f2c Mon Sep 17 00:00:00 2001
 From: Mahesh Bodapati <mbodapat@xilinx.com>
 Date: Tue, 13 Sep 2022 12:03:08 +0530
-Subject: [PATCH 23/53] [patch,microblaze]: Fix the calculation of high word in
- a long long 64-bit
+Subject: [PATCH 23/54] Fix the calculation of high word in a long long 64-bit
 
     This patch will change the calculation of high word in a long long 64-bit.
     Earlier to this patch the high word of long long word (0xF0000000ULL) is
@@ -19,10 +18,10 @@ Subject: [PATCH 23/53] [patch,microblaze]: Fix the calculation of high word in
  1 file changed, 3 deletions(-)
 
 diff --git a/gcc/config/microblaze/microblaze.cc b/gcc/config/microblaze/microblaze.cc
-index 907c0afa9b8..f75eaff4b49 100644
+index 4967d6a0133..2d516724acc 100644
 --- a/gcc/config/microblaze/microblaze.cc
 +++ b/gcc/config/microblaze/microblaze.cc
-@@ -2469,9 +2469,6 @@ print_operand (FILE * file, rtx op, int letter)
+@@ -2474,9 +2474,6 @@ print_operand (FILE * file, rtx op, int letter)
          {
           val[0] = (INTVAL (op) & 0xffffffff00000000LL) >> 32;
           val[1] = INTVAL (op) & 0x00000000ffffffffLL;
@@ -33,5 +32,5 @@ index 907c0afa9b8..f75eaff4b49 100644
        fprintf (file, "0x%8.8lx", (letter == 'h') ? val[0] : val[1]);
      }
 -- 
-2.37.1 (Apple Git-137.1)
+2.34.1
 
diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-12/0024-Patch-MicroBlaze-this-patch-has-1.Fixed-the-bug-in.patch b/meta-microblaze/recipes-devtools/gcc/gcc-13/0024-this-patch-has-1.Fixed-the-bug-in-version-calculatio.patch
index 8ed5ae83..0356657b 100644
--- a/meta-microblaze/recipes-devtools/gcc/gcc-12/0024-Patch-MicroBlaze-this-patch-has-1.Fixed-the-bug-in.patch
+++ b/meta-microblaze/recipes-devtools/gcc/gcc-13/0024-this-patch-has-1.Fixed-the-bug-in-version-calculatio.patch
@@ -1,8 +1,8 @@
-From 89269c9b8d2047ebbc13e98c45e94746edc63de6 Mon Sep 17 00:00:00 2001
+From a8991be91d79cf0bd17b7d303a10ec5edd7408c6 Mon Sep 17 00:00:00 2001
 From: Mahesh Bodapati <mbodapat@xilinx.com>
 Date: Tue, 13 Sep 2022 12:23:54 +0530
-Subject: [PATCH 24/53] [Patch,MicroBlaze] : this patch has 1.Fixed the bug in 
- version calculation. 2.Add new bitfield instructions.
+Subject: [PATCH 24/54] this patch has 1.Fixed the bug in version calculation.
+ 2.Add new bitfield instructions.
 
 Signed-off-by :Mahesh Bodapati <mbodapat@xilinx.com>
 ---
@@ -12,7 +12,7 @@ Signed-off-by :Mahesh Bodapati <mbodapat@xilinx.com>
  3 files changed, 147 insertions(+), 78 deletions(-)
 
 diff --git a/gcc/config/microblaze/microblaze.cc b/gcc/config/microblaze/microblaze.cc
-index f75eaff4b49..3abfc834ff2 100644
+index 2d516724acc..e28ab593c3e 100644
 --- a/gcc/config/microblaze/microblaze.cc
 +++ b/gcc/config/microblaze/microblaze.cc
 @@ -165,6 +165,9 @@ int microblaze_no_unsafe_delay;
@@ -89,7 +89,7 @@ index f75eaff4b49..3abfc834ff2 100644
  /* Return truth value if a CONST_DOUBLE is ok to be a legitimate constant.  */
  static bool
  microblaze_const_double_ok (rtx op, machine_mode mode)
-@@ -1339,8 +1399,7 @@ microblaze_rtx_costs (rtx x, machine_mode mode, int outer_code ATTRIBUTE_UNUSED,
+@@ -1344,8 +1404,7 @@ microblaze_rtx_costs (rtx x, machine_mode mode, int outer_code ATTRIBUTE_UNUSED,
        {
         if (TARGET_BARREL_SHIFT)
           {
@@ -99,7 +99,7 @@ index f75eaff4b49..3abfc834ff2 100644
               *total = COSTS_N_INSNS (1);
             else
               *total = COSTS_N_INSNS (2);
-@@ -1401,8 +1460,7 @@ microblaze_rtx_costs (rtx x, machine_mode mode, int outer_code ATTRIBUTE_UNUSED,
+@@ -1406,8 +1465,7 @@ microblaze_rtx_costs (rtx x, machine_mode mode, int outer_code ATTRIBUTE_UNUSED,
           }
         else if (!TARGET_SOFT_MUL)
           {
@@ -109,7 +109,7 @@ index f75eaff4b49..3abfc834ff2 100644
               *total = COSTS_N_INSNS (1);
             else
               *total = COSTS_N_INSNS (3);
-@@ -1675,72 +1733,13 @@ function_arg_partial_bytes (cumulative_args_t cum_v,
+@@ -1680,72 +1738,13 @@ function_arg_partial_bytes (cumulative_args_t cum_v,
    return 0;
  }
  
@@ -183,7 +183,7 @@ index f75eaff4b49..3abfc834ff2 100644
  
    microblaze_section_threshold = (OPTION_SET_P (g_switch_value)
                                   ? g_switch_value
-@@ -1761,13 +1760,13 @@ microblaze_option_override (void)
+@@ -1766,13 +1765,13 @@ microblaze_option_override (void)
    /* Check the MicroBlaze CPU version for any special action to be done.  */
    if (microblaze_select_cpu == NULL)
      microblaze_select_cpu = MICROBLAZE_DEFAULT_CPU;
@@ -200,7 +200,7 @@ index f75eaff4b49..3abfc834ff2 100644
    if (ver < 0)
      {
        /* No hardware exceptions in earlier versions. So no worries.  */
-@@ -1778,8 +1777,7 @@ microblaze_option_override (void)
+@@ -1783,8 +1782,7 @@ microblaze_option_override (void)
        microblaze_pipe = MICROBLAZE_PIPE_3;
      }
    else if (ver == 0
@@ -210,7 +210,7 @@ index f75eaff4b49..3abfc834ff2 100644
      {
  #if 0
        microblaze_select_flags |= (MICROBLAZE_MASK_NO_UNSAFE_DELAY);
-@@ -1796,11 +1794,9 @@ microblaze_option_override (void)
+@@ -1801,11 +1799,9 @@ microblaze_option_override (void)
  #endif
        microblaze_no_unsafe_delay = 0;
        microblaze_pipe = MICROBLAZE_PIPE_5;
@@ -225,7 +225,7 @@ index f75eaff4b49..3abfc834ff2 100644
         {
           /* Pattern compares are to be turned on by default only when 
              compiling for MB v5.00.'z'.  */
-@@ -1808,7 +1804,7 @@ microblaze_option_override (void)
+@@ -1813,7 +1809,7 @@ microblaze_option_override (void)
         }
      }
  
@@ -234,7 +234,7 @@ index f75eaff4b49..3abfc834ff2 100644
    if (ver < 0)
      {
        if (TARGET_MULTIPLY_HIGH)
-@@ -1817,7 +1813,7 @@ microblaze_option_override (void)
+@@ -1822,7 +1818,7 @@ microblaze_option_override (void)
                  "%<-mcpu=v6.00.a%> or greater");
      }
  
@@ -243,7 +243,7 @@ index f75eaff4b49..3abfc834ff2 100644
    microblaze_has_clz = 1;
    if (ver < 0)
      {
-@@ -1826,7 +1822,7 @@ microblaze_option_override (void)
+@@ -1831,7 +1827,7 @@ microblaze_option_override (void)
      }
  
    /* TARGET_REORDER defaults to 2 if -mxl-reorder not specified.  */
@@ -252,7 +252,7 @@ index f75eaff4b49..3abfc834ff2 100644
    if (ver < 0)
      {
          if (TARGET_REORDER == 1)
-@@ -1841,7 +1837,7 @@ microblaze_option_override (void)
+@@ -1846,7 +1842,7 @@ microblaze_option_override (void)
                    "%<-mcpu=v8.30.a%>");
          TARGET_REORDER = 0;
      }
@@ -261,7 +261,7 @@ index f75eaff4b49..3abfc834ff2 100644
    if (ver < 0)
      {
         if (TARGET_AREA_OPTIMIZED_2)
-@@ -1851,6 +1847,8 @@ microblaze_option_override (void)
+@@ -1856,6 +1852,8 @@ microblaze_option_override (void)
      {
         if (TARGET_AREA_OPTIMIZED_2)
          microblaze_pipe = MICROBLAZE_PIPE_8;
@@ -271,10 +271,10 @@ index f75eaff4b49..3abfc834ff2 100644
  
    if (TARGET_MULTIPLY_HIGH && TARGET_SOFT_MUL)
 diff --git a/gcc/config/microblaze/microblaze.h b/gcc/config/microblaze/microblaze.h
-index 640ae6ea9a3..67015058198 100644
+index e4faa9c681f..94d96bf6b5d 100644
 --- a/gcc/config/microblaze/microblaze.h
 +++ b/gcc/config/microblaze/microblaze.h
-@@ -44,6 +44,7 @@ extern int microblaze_dbx_regno[];
+@@ -44,6 +44,7 @@ extern int microblaze_debugger_regno[];
  
  extern int microblaze_no_unsafe_delay;
  extern int microblaze_has_clz;
@@ -291,7 +291,7 @@ index 640ae6ea9a3..67015058198 100644
  #define TARGET_SUPPORTS_PIC 1
  
 diff --git a/gcc/config/microblaze/microblaze.md b/gcc/config/microblaze/microblaze.md
-index 9e9dfb1ccb0..dede4d068d3 100644
+index 7a01b28d8f0..a76287ab4fd 100644
 --- a/gcc/config/microblaze/microblaze.md
 +++ b/gcc/config/microblaze/microblaze.md
 @@ -2491,4 +2491,73 @@
@@ -369,5 +369,5 @@ index 9e9dfb1ccb0..dede4d068d3 100644
 +
  (include "sync.md")
 -- 
-2.37.1 (Apple Git-137.1)
+2.34.1
 
diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-12/0025-Fixing-the-issue-with-the-builtin_alloc.patch b/meta-microblaze/recipes-devtools/gcc/gcc-13/0025-Fixing-the-issue-with-the-builtin_alloc.-register-r1.patch
index 109e0686..cd286818 100644
--- a/meta-microblaze/recipes-devtools/gcc/gcc-12/0025-Fixing-the-issue-with-the-builtin_alloc.patch
+++ b/meta-microblaze/recipes-devtools/gcc/gcc-13/0025-Fixing-the-issue-with-the-builtin_alloc.-register-r1.patch
@@ -1,7 +1,7 @@
-From 101f47dedd82fc09bcefd5db986e6d6b0a1761ad Mon Sep 17 00:00:00 2001
+From 85273a514d0ab3b243b947633ab46705a0d946bc Mon Sep 17 00:00:00 2001
 From: Nagaraju Mekala <nmekala@xilix.com>
 Date: Thu, 23 Feb 2017 17:09:04 +0530
-Subject: [PATCH 25/53] Fixing the issue with the builtin_alloc. register r18
+Subject: [PATCH 25/54] Fixing the issue with the builtin_alloc. register r18
  was not properly handling the stack pattern which was resolved by using free
  available register
 
@@ -11,7 +11,7 @@ signed-off-by:nagaraju mekala <nmekala@xilinx.com>
  1 file changed, 4 insertions(+), 4 deletions(-)
 
 diff --git a/gcc/config/microblaze/microblaze.md b/gcc/config/microblaze/microblaze.md
-index dede4d068d3..c6d8a87e9d1 100644
+index a76287ab4fd..12270f135cf 100644
 --- a/gcc/config/microblaze/microblaze.md
 +++ b/gcc/config/microblaze/microblaze.md
 @@ -2075,10 +2075,10 @@
@@ -40,5 +40,5 @@ index dede4d068d3..c6d8a87e9d1 100644
    }
  )
 -- 
-2.37.1 (Apple Git-137.1)
+2.34.1
 
diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-12/0026-Patch-Microblaze-Removed-fsqrt-generation-for-double.patch b/meta-microblaze/recipes-devtools/gcc/gcc-13/0026-Removed-fsqrt-generation-for-double-values.patch
index 4f101b96..02cc5a1e 100644
--- a/meta-microblaze/recipes-devtools/gcc/gcc-12/0026-Patch-Microblaze-Removed-fsqrt-generation-for-double.patch
+++ b/meta-microblaze/recipes-devtools/gcc/gcc-13/0026-Removed-fsqrt-generation-for-double-values.patch
@@ -1,15 +1,14 @@
-From b3e51ca34dc4048445b178253051ad4bbdfc5ec4 Mon Sep 17 00:00:00 2001
+From aba85eba7bc5cc19edafe54379fb1f1794dc3844 Mon Sep 17 00:00:00 2001
 From: Mahesh Bodapati <mbodapat@xilinx.com>
 Date: Mon, 4 Jun 2018 10:10:18 +0530
-Subject: [PATCH 26/53] [Patch,Microblaze] : Removed fsqrt generation for
- double values.
+Subject: [PATCH 26/54] Removed fsqrt generation for double values.
 
 ---
  gcc/config/microblaze/microblaze.md | 14 --------------
  1 file changed, 14 deletions(-)
 
 diff --git a/gcc/config/microblaze/microblaze.md b/gcc/config/microblaze/microblaze.md
-index c6d8a87e9d1..f23a85c7ac7 100644
+index 12270f135cf..b05f7da30b4 100644
 --- a/gcc/config/microblaze/microblaze.md
 +++ b/gcc/config/microblaze/microblaze.md
 @@ -526,20 +526,6 @@
@@ -34,5 +33,5 @@ index c6d8a87e9d1..f23a85c7ac7 100644
    [(set (match_operand:SI 0 "register_operand" "=d")
          (fix:SI (match_operand:SF 1 "register_operand" "d")))]
 -- 
-2.37.1 (Apple Git-137.1)
+2.34.1
 
diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-12/0027-Patch-MicroBlaze-Intial-commit-of-64-bit-Microblaze.patch b/meta-microblaze/recipes-devtools/gcc/gcc-13/0027-Intial-commit-of-64-bit-Microblaze.patch
index 2e7106d6..c998d5eb 100644
--- a/meta-microblaze/recipes-devtools/gcc/gcc-12/0027-Patch-MicroBlaze-Intial-commit-of-64-bit-Microblaze.patch
+++ b/meta-microblaze/recipes-devtools/gcc/gcc-13/0027-Intial-commit-of-64-bit-Microblaze.patch
@@ -1,7 +1,7 @@
-From cf9ab9693d02212e1a49465e55d759a01acc507a Mon Sep 17 00:00:00 2001
+From dd3eee641d2bf28216bf02f324cf8b81d4a61e43 Mon Sep 17 00:00:00 2001
 From: Mahesh Bodapati <mbodapat@xilinx.com>
 Date: Tue, 13 Sep 2022 13:56:52 +0530
-Subject: [PATCH 27/53]  [Patch,MicroBlaze]: Intial commit of 64-bit Microblaze
+Subject: [PATCH 27/54] Intial commit of 64-bit Microblaze
 
     Conflicts:
         gcc/config/microblaze/microblaze.md
@@ -16,7 +16,7 @@ Subject: [PATCH 27/53]  [Patch,MicroBlaze]: Intial commit of 64-bit Microblaze
  7 files changed, 456 insertions(+), 30 deletions(-)
 
 diff --git a/gcc/config/microblaze/constraints.md b/gcc/config/microblaze/constraints.md
-index a8934d305ee..2133650147e 100644
+index aae4be73ae3..26742d34980 100644
 --- a/gcc/config/microblaze/constraints.md
 +++ b/gcc/config/microblaze/constraints.md
 @@ -52,6 +52,12 @@
@@ -33,7 +33,7 @@ index a8934d305ee..2133650147e 100644
  
  (define_constraint "G"
 diff --git a/gcc/config/microblaze/microblaze-protos.h b/gcc/config/microblaze/microblaze-protos.h
-index 848cd509003..7f575c2adec 100644
+index 41557af0f3c..0e9f783c4a4 100644
 --- a/gcc/config/microblaze/microblaze-protos.h
 +++ b/gcc/config/microblaze/microblaze-protos.h
 @@ -36,6 +36,7 @@ extern void microblaze_expand_divide (rtx *);
@@ -45,10 +45,10 @@ index 848cd509003..7f575c2adec 100644
  extern void print_operand (FILE *, rtx, int);
  extern void print_operand_address (FILE *, rtx);
 diff --git a/gcc/config/microblaze/microblaze.cc b/gcc/config/microblaze/microblaze.cc
-index 3abfc834ff2..1ac889041b8 100644
+index e28ab593c3e..7975bc182f2 100644
 --- a/gcc/config/microblaze/microblaze.cc
 +++ b/gcc/config/microblaze/microblaze.cc
-@@ -3433,11 +3433,11 @@ microblaze_expand_move (machine_mode mode, rtx operands[])
+@@ -3438,11 +3438,11 @@ microblaze_expand_move (machine_mode mode, rtx operands[])
    op0 = operands[0];
    op1 = operands[1];
  
@@ -63,7 +63,7 @@ index 3abfc834ff2..1ac889041b8 100644
        emit_move_insn (op0, temp);
        return true;
      }
-@@ -3502,12 +3502,12 @@ microblaze_expand_move (machine_mode mode, rtx operands[])
+@@ -3511,12 +3511,12 @@ microblaze_expand_move (machine_mode mode, rtx operands[])
                   && (flag_pic == 2 || microblaze_tls_symbol_p (p0)
                       || !SMALL_INT (p1)))))
         {
@@ -78,7 +78,7 @@ index 3abfc834ff2..1ac889041b8 100644
           return true;
         }
      }
-@@ -3638,7 +3638,7 @@ microblaze_expand_conditional_branch (machine_mode mode, rtx operands[])
+@@ -3647,7 +3647,7 @@ microblaze_expand_conditional_branch (machine_mode mode, rtx operands[])
    rtx cmp_op0 = operands[1];
    rtx cmp_op1 = operands[2];
    rtx label1 = operands[3];
@@ -87,7 +87,7 @@ index 3abfc834ff2..1ac889041b8 100644
    rtx condition;
  
    gcc_assert ((GET_CODE (cmp_op0) == REG) || (GET_CODE (cmp_op0) == SUBREG));
-@@ -3647,23 +3647,36 @@ microblaze_expand_conditional_branch (machine_mode mode, rtx operands[])
+@@ -3656,23 +3656,36 @@ microblaze_expand_conditional_branch (machine_mode mode, rtx operands[])
    if (cmp_op1 == const0_rtx)
      {
        comp_reg = cmp_op0;
@@ -130,7 +130,7 @@ index 3abfc834ff2..1ac889041b8 100644
      }
  }
  
-@@ -3674,7 +3687,7 @@ microblaze_expand_conditional_branch_reg (machine_mode mode, rtx operands[])
+@@ -3683,7 +3696,7 @@ microblaze_expand_conditional_branch_reg (machine_mode mode, rtx operands[])
    rtx cmp_op0 = operands[1];
    rtx cmp_op1 = operands[2];
    rtx label1 = operands[3];
@@ -139,7 +139,7 @@ index 3abfc834ff2..1ac889041b8 100644
    rtx condition;
  
    gcc_assert ((GET_CODE (cmp_op0) == REG)
-@@ -3685,30 +3698,63 @@ microblaze_expand_conditional_branch_reg (machine_mode mode, rtx operands[])
+@@ -3694,30 +3707,63 @@ microblaze_expand_conditional_branch_reg (machine_mode mode, rtx operands[])
      {
        comp_reg = cmp_op0;
        condition = gen_rtx_fmt_ee (signed_condition (code),
@@ -215,7 +215,7 @@ index 3abfc834ff2..1ac889041b8 100644
      }
  }
  
-@@ -3725,6 +3771,19 @@ microblaze_expand_conditional_branch_sf (rtx operands[])
+@@ -3734,6 +3780,19 @@ microblaze_expand_conditional_branch_sf (rtx operands[])
    emit_jump_insn (gen_condjump (condition, operands[3]));
  }
  
@@ -236,7 +236,7 @@ index 3abfc834ff2..1ac889041b8 100644
  
  static bool
 diff --git a/gcc/config/microblaze/microblaze.h b/gcc/config/microblaze/microblaze.h
-index 67015058198..885abc6e5a1 100644
+index 94d96bf6b5d..f35f7075ce3 100644
 --- a/gcc/config/microblaze/microblaze.h
 +++ b/gcc/config/microblaze/microblaze.h
 @@ -102,6 +102,7 @@ extern enum pipeline_type microblaze_pipe;
@@ -265,7 +265,7 @@ index 67015058198..885abc6e5a1 100644
  #define FLOAT_TYPE_SIZE         32
  #define DOUBLE_TYPE_SIZE        64
 diff --git a/gcc/config/microblaze/microblaze.md b/gcc/config/microblaze/microblaze.md
-index f23a85c7ac7..40711fe224b 100644
+index b05f7da30b4..3f572fe2351 100644
 --- a/gcc/config/microblaze/microblaze.md
 +++ b/gcc/config/microblaze/microblaze.md
 @@ -497,7 +497,6 @@
@@ -747,7 +747,7 @@ index f23a85c7ac7..40711fe224b 100644
  ;; Unconditional branches
  ;;----------------------------------------------------------------
 diff --git a/gcc/config/microblaze/microblaze.opt b/gcc/config/microblaze/microblaze.opt
-index cc009363f87..10910dbb83f 100644
+index 37aaaf9ffda..96615a6d2c4 100644
 --- a/gcc/config/microblaze/microblaze.opt
 +++ b/gcc/config/microblaze/microblaze.opt
 @@ -136,4 +136,9 @@ Target
@@ -780,5 +780,5 @@ index 7e2fc5dcef8..4c25cfe15e7 100644
  # Extra files
  microblaze-c.o: $(srcdir)/config/microblaze/microblaze-c.cc \
 -- 
-2.37.1 (Apple Git-137.1)
+2.34.1
 
diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-12/0028-Intial-commit-for-64bit-MB-sources.patch b/meta-microblaze/recipes-devtools/gcc/gcc-13/0028-Intial-commit-for-64bit-MB-sources.-Need-to-cleanup-.patch
index 1ffa79cb..58bb6fd8 100644
--- a/meta-microblaze/recipes-devtools/gcc/gcc-12/0028-Intial-commit-for-64bit-MB-sources.patch
+++ b/meta-microblaze/recipes-devtools/gcc/gcc-13/0028-Intial-commit-for-64bit-MB-sources.-Need-to-cleanup-.patch
@@ -1,8 +1,8 @@
-From da40b160857d0b6a56b6f6c9c81d61dabb5255db Mon Sep 17 00:00:00 2001
+From fcec4be11de1c646bdcd6dcfc3844b7deb42898e Mon Sep 17 00:00:00 2001
 From: Mahesh Bodapati <mbodapat@xilinx.com>
 Date: Tue, 13 Sep 2022 14:38:48 +0530
-Subject: [PATCH 28/53]  Intial commit for 64bit-MB sources.  Need to cleanup
- the code later.
+Subject: [PATCH 28/54] Intial commit for 64bit-MB sources. Need to cleanup the
+ code later.
 
 ---
  gcc/config/microblaze/constraints.md    |   2 +-
@@ -29,7 +29,7 @@ Subject: [PATCH 28/53]  Intial commit for 64bit-MB sources.  Need to cleanup
  create mode 100644 libgcc/config/microblaze/umoddi3.S
 
 diff --git a/gcc/config/microblaze/constraints.md b/gcc/config/microblaze/constraints.md
-index 2133650147e..0ced155340d 100644
+index 26742d34980..7bb1e0b4c8d 100644
 --- a/gcc/config/microblaze/constraints.md
 +++ b/gcc/config/microblaze/constraints.md
 @@ -55,7 +55,7 @@
@@ -42,7 +42,7 @@ index 2133650147e..0ced155340d 100644
  
  ;; Define floating point constraints
 diff --git a/gcc/config/microblaze/microblaze-c.cc b/gcc/config/microblaze/microblaze-c.cc
-index caabe99b993..ef8d2430565 100644
+index 065351ad218..af73de0709c 100644
 --- a/gcc/config/microblaze/microblaze-c.cc
 +++ b/gcc/config/microblaze/microblaze-c.cc
 @@ -100,4 +100,10 @@ microblaze_cpp_define (cpp_reader *pfile)
@@ -57,7 +57,7 @@ index caabe99b993..ef8d2430565 100644
 +    }
  }  
 diff --git a/gcc/config/microblaze/microblaze.cc b/gcc/config/microblaze/microblaze.cc
-index 1ac889041b8..9d3628c6816 100644
+index 7975bc182f2..46bbf8a21e7 100644
 --- a/gcc/config/microblaze/microblaze.cc
 +++ b/gcc/config/microblaze/microblaze.cc
 @@ -384,10 +384,10 @@ simple_memory_operand (rtx op, machine_mode mode ATTRIBUTE_UNUSED)
@@ -100,7 +100,7 @@ index 1ac889041b8..9d3628c6816 100644
        info->type = ADDRESS_GOTOFF;
      }
    else if (XINT (x, 1) == UNSPEC_PLT)
-@@ -1303,8 +1303,16 @@ microblaze_block_move_loop (rtx dest, rtx src, HOST_WIDE_INT length)
+@@ -1308,8 +1308,16 @@ microblaze_block_move_loop (rtx dest, rtx src, HOST_WIDE_INT length)
    emit_move_insn (dest_reg, plus_constant (Pmode, dest_reg, MAX_MOVE_BYTES));
  
    /* Emit the test & branch.  */
@@ -118,7 +118,7 @@ index 1ac889041b8..9d3628c6816 100644
  
    /* Mop up any left-over bytes.  */
    if (leftover)
-@@ -1634,14 +1642,20 @@ microblaze_function_arg_advance (cumulative_args_t cum_v,
+@@ -1639,14 +1647,20 @@ microblaze_function_arg_advance (cumulative_args_t cum_v,
        break;
  
      case E_DFmode:
@@ -141,7 +141,7 @@ index 1ac889041b8..9d3628c6816 100644
        break;
  
      case E_QImode:
-@@ -2156,7 +2170,7 @@ compute_frame_size (HOST_WIDE_INT size)
+@@ -2161,7 +2175,7 @@ compute_frame_size (HOST_WIDE_INT size)
  
           if (regno != MB_ABI_SUB_RETURN_ADDR_REGNUM)
             /* Don't account for link register. It is accounted specially below.  */
@@ -150,7 +150,7 @@ index 1ac889041b8..9d3628c6816 100644
  
           mask |= (1L << (regno - GP_REG_FIRST));
         }
-@@ -2425,7 +2439,7 @@ print_operand (FILE * file, rtx op, int letter)
+@@ -2430,7 +2444,7 @@ print_operand (FILE * file, rtx op, int letter)
  
        if ((letter == 'M' && !WORDS_BIG_ENDIAN)
           || (letter == 'L' && WORDS_BIG_ENDIAN) || letter == 'D')
@@ -159,7 +159,7 @@ index 1ac889041b8..9d3628c6816 100644
  
        fprintf (file, "%s", reg_names[regnum]);
      }
-@@ -2451,6 +2465,7 @@ print_operand (FILE * file, rtx op, int letter)
+@@ -2456,6 +2470,7 @@ print_operand (FILE * file, rtx op, int letter)
    else if (letter == 'h' || letter == 'j')
      {
        long val[2];
@@ -167,7 +167,7 @@ index 1ac889041b8..9d3628c6816 100644
        long l[2];
        if (code == CONST_DOUBLE)
         {
-@@ -2463,12 +2478,12 @@ print_operand (FILE * file, rtx op, int letter)
+@@ -2468,12 +2483,12 @@ print_operand (FILE * file, rtx op, int letter)
               val[0] = l[WORDS_BIG_ENDIAN != 0];
             }
         }
@@ -184,7 +184,7 @@ index 1ac889041b8..9d3628c6816 100644
      }
    else if (code == CONST_DOUBLE)
      {
-@@ -2662,7 +2677,10 @@ microblaze_asm_constructor (rtx symbol ATTRIBUTE_UNUSED, int priority)
+@@ -2667,7 +2682,10 @@ microblaze_asm_constructor (rtx symbol ATTRIBUTE_UNUSED, int priority)
  
      switch_to_section (get_section (section, 0, NULL));
      assemble_align (POINTER_SIZE);
@@ -196,7 +196,7 @@ index 1ac889041b8..9d3628c6816 100644
      output_addr_const (asm_out_file, symbol);
      fputs ("\n", asm_out_file);
  }
-@@ -2685,7 +2703,10 @@ microblaze_asm_destructor (rtx symbol, int priority)
+@@ -2690,7 +2708,10 @@ microblaze_asm_destructor (rtx symbol, int priority)
  
      switch_to_section (get_section (section, 0, NULL));
      assemble_align (POINTER_SIZE);
@@ -208,7 +208,7 @@ index 1ac889041b8..9d3628c6816 100644
      output_addr_const (asm_out_file, symbol);
      fputs ("\n", asm_out_file);
  }
-@@ -2751,7 +2772,7 @@ save_restore_insns (int prologue)
+@@ -2756,7 +2777,7 @@ save_restore_insns (int prologue)
    /* For interrupt_handlers, need to save/restore the MSR.  */
    if (microblaze_is_interrupt_variant ())
      {
@@ -217,7 +217,7 @@ index 1ac889041b8..9d3628c6816 100644
                                  gen_rtx_PLUS (Pmode, base_reg_rtx,
                                                GEN_INT (current_frame_info.
                                                         gp_offset -
-@@ -2759,8 +2780,8 @@ save_restore_insns (int prologue)
+@@ -2764,8 +2785,8 @@ save_restore_insns (int prologue)
  
        /* Do not optimize in flow analysis.  */
        MEM_VOLATILE_P (isr_mem_rtx) = 1;
@@ -228,7 +228,7 @@ index 1ac889041b8..9d3628c6816 100644
      }
  
    if (microblaze_is_interrupt_variant () && !prologue)
-@@ -2768,8 +2789,8 @@ save_restore_insns (int prologue)
+@@ -2773,8 +2794,8 @@ save_restore_insns (int prologue)
        emit_move_insn (isr_reg_rtx, isr_mem_rtx);
        emit_move_insn (isr_msr_rtx, isr_reg_rtx);
        /* Do not optimize in flow analysis.  */
@@ -239,7 +239,7 @@ index 1ac889041b8..9d3628c6816 100644
      }
  
    for (regno = GP_REG_FIRST; regno <= GP_REG_LAST; regno++)
-@@ -2780,9 +2801,9 @@ save_restore_insns (int prologue)
+@@ -2785,9 +2806,9 @@ save_restore_insns (int prologue)
             /* Don't handle here. Already handled as the first register.  */
             continue;
  
@@ -251,7 +251,7 @@ index 1ac889041b8..9d3628c6816 100644
           if (microblaze_is_interrupt_variant () || save_volatiles)
             /* Do not optimize in flow analysis.  */
             MEM_VOLATILE_P (mem_rtx) = 1;
-@@ -2797,7 +2818,7 @@ save_restore_insns (int prologue)
+@@ -2802,7 +2823,7 @@ save_restore_insns (int prologue)
               insn = emit_move_insn (reg_rtx, mem_rtx);
             }
  
@@ -260,7 +260,7 @@ index 1ac889041b8..9d3628c6816 100644
         }
      }
  
-@@ -2807,8 +2828,8 @@ save_restore_insns (int prologue)
+@@ -2812,8 +2833,8 @@ save_restore_insns (int prologue)
        emit_move_insn (isr_mem_rtx, isr_reg_rtx);
  
        /* Do not optimize in flow analysis.  */
@@ -271,7 +271,7 @@ index 1ac889041b8..9d3628c6816 100644
      }
  
    /* Done saving and restoring */
-@@ -2898,7 +2919,10 @@ microblaze_elf_asm_cdtor (rtx symbol, int priority, bool is_ctor)
+@@ -2903,7 +2924,10 @@ microblaze_elf_asm_cdtor (rtx symbol, int priority, bool is_ctor)
  
    switch_to_section (s);
    assemble_align (POINTER_SIZE);
@@ -283,7 +283,7 @@ index 1ac889041b8..9d3628c6816 100644
    output_addr_const (asm_out_file, symbol);
    fputs ("\n", asm_out_file);
  }
-@@ -3042,10 +3066,10 @@ microblaze_expand_prologue (void)
+@@ -3047,10 +3071,10 @@ microblaze_expand_prologue (void)
         {
           if (offset != 0)
             ptr = gen_rtx_PLUS (Pmode, stack_pointer_rtx, GEN_INT (offset));
@@ -297,7 +297,7 @@ index 1ac889041b8..9d3628c6816 100644
         }
      }
  
-@@ -3054,15 +3078,23 @@ microblaze_expand_prologue (void)
+@@ -3059,15 +3083,23 @@ microblaze_expand_prologue (void)
        rtx fsiz_rtx = GEN_INT (fsiz);
  
        rtx_insn *insn = NULL;
@@ -323,7 +323,7 @@ index 1ac889041b8..9d3628c6816 100644
                                  gen_rtx_PLUS (Pmode, stack_pointer_rtx,
                                                const0_rtx));
  
-@@ -3070,7 +3102,7 @@ microblaze_expand_prologue (void)
+@@ -3075,7 +3107,7 @@ microblaze_expand_prologue (void)
             /* Do not optimize in flow analysis.  */
             MEM_VOLATILE_P (mem_rtx) = 1;
  
@@ -332,7 +332,7 @@ index 1ac889041b8..9d3628c6816 100644
           insn = emit_move_insn (mem_rtx, reg_rtx);
           RTX_FRAME_RELATED_P (insn) = 1;
         }
-@@ -3180,12 +3212,12 @@ microblaze_expand_epilogue (void)
+@@ -3185,12 +3217,12 @@ microblaze_expand_epilogue (void)
        if (!crtl->is_leaf || interrupt_handler)
         {
           mem_rtx =
@@ -347,7 +347,7 @@ index 1ac889041b8..9d3628c6816 100644
           emit_move_insn (reg_rtx, mem_rtx);
         }
  
-@@ -3201,15 +3233,25 @@ microblaze_expand_epilogue (void)
+@@ -3206,15 +3238,25 @@ microblaze_expand_epilogue (void)
        /* _restore_ registers for epilogue.  */
        save_restore_insns (0);
        emit_insn (gen_blockage ());
@@ -377,7 +377,7 @@ index 1ac889041b8..9d3628c6816 100644
    emit_jump_insn (gen_return_internal (gen_rtx_REG (Pmode, GP_REG_FIRST +
                                                     MB_ABI_SUB_RETURN_ADDR_REGNUM)));
  }
-@@ -3376,9 +3418,14 @@ microblaze_asm_output_mi_thunk (FILE *file, tree thunk_fndecl ATTRIBUTE_UNUSED,
+@@ -3381,9 +3423,14 @@ microblaze_asm_output_mi_thunk (FILE *file, tree thunk_fndecl ATTRIBUTE_UNUSED,
    else
      this_rtx = gen_rtx_REG (Pmode, MB_ABI_FIRST_ARG_REGNUM);
  
@@ -394,7 +394,7 @@ index 1ac889041b8..9d3628c6816 100644
  
    /* Apply the offset from the vtable, if required.  */
    if (vcall_offset)
-@@ -3391,7 +3438,10 @@ microblaze_asm_output_mi_thunk (FILE *file, tree thunk_fndecl ATTRIBUTE_UNUSED,
+@@ -3396,7 +3443,10 @@ microblaze_asm_output_mi_thunk (FILE *file, tree thunk_fndecl ATTRIBUTE_UNUSED,
      rtx loc = gen_rtx_PLUS (Pmode, temp1, vcall_offset_rtx);
      emit_move_insn (temp1, gen_rtx_MEM (Pmode, loc));
  
@@ -406,7 +406,7 @@ index 1ac889041b8..9d3628c6816 100644
    }
  
    /* Generate a tail call to the target function.  */
-@@ -3622,9 +3672,9 @@ microblaze_trampoline_init (rtx m_tramp, tree fndecl, rtx chain_value)
+@@ -3631,9 +3681,9 @@ microblaze_trampoline_init (rtx m_tramp, tree fndecl, rtx chain_value)
    emit_block_move (m_tramp, assemble_trampoline_template (),
                    GEN_INT (6*UNITS_PER_WORD), BLOCK_OP_NORMAL);
  
@@ -418,7 +418,7 @@ index 1ac889041b8..9d3628c6816 100644
    emit_move_insn (mem, fnaddr);
  }
  
-@@ -3648,7 +3698,7 @@ microblaze_expand_conditional_branch (machine_mode mode, rtx operands[])
+@@ -3657,7 +3707,7 @@ microblaze_expand_conditional_branch (machine_mode mode, rtx operands[])
      {
        comp_reg = cmp_op0;
        condition = gen_rtx_fmt_ee (signed_condition (code), mode, comp_reg, const0_rtx);
@@ -427,7 +427,7 @@ index 1ac889041b8..9d3628c6816 100644
          emit_jump_insn (gen_condjump (condition, label1));
        else
          emit_jump_insn (gen_long_condjump (condition, label1));
-@@ -3767,7 +3817,7 @@ microblaze_expand_conditional_branch_sf (rtx operands[])
+@@ -3776,7 +3826,7 @@ microblaze_expand_conditional_branch_sf (rtx operands[])
    rtx comp_reg = gen_reg_rtx (SImode);
  
    emit_insn (gen_cstoresf4 (comp_reg, operands[0], cmp_op0, cmp_op1));
@@ -436,7 +436,7 @@ index 1ac889041b8..9d3628c6816 100644
    emit_jump_insn (gen_condjump (condition, operands[3]));
  }
  
-@@ -3777,10 +3827,10 @@ microblaze_expand_conditional_branch_df (rtx operands[])
+@@ -3786,10 +3836,10 @@ microblaze_expand_conditional_branch_df (rtx operands[])
    rtx condition;
    rtx cmp_op0 = XEXP (operands[0], 0);
    rtx cmp_op1 = XEXP (operands[0], 1);
@@ -449,7 +449,7 @@ index 1ac889041b8..9d3628c6816 100644
    emit_jump_insn (gen_long_condjump (condition, operands[3]));
  }
  
-@@ -3801,8 +3851,8 @@ microblaze_expand_divide (rtx operands[])
+@@ -3810,8 +3860,8 @@ microblaze_expand_divide (rtx operands[])
  {
    /* Table lookup software divides. Works for all (nr/dr) where (0 <= nr,dr <= 15).  */
  
@@ -460,7 +460,7 @@ index 1ac889041b8..9d3628c6816 100644
    rtx regqi = gen_reg_rtx (QImode);
    rtx_code_label *div_label = gen_label_rtx ();
    rtx_code_label *div_end_label = gen_label_rtx ();
-@@ -3810,17 +3860,31 @@ microblaze_expand_divide (rtx operands[])
+@@ -3819,17 +3869,31 @@ microblaze_expand_divide (rtx operands[])
    rtx mem_rtx;
    rtx ret;
    rtx_insn *jump, *cjump, *insn;
@@ -499,7 +499,7 @@ index 1ac889041b8..9d3628c6816 100644
    mem_rtx = gen_rtx_MEM (QImode,
                              gen_rtx_PLUS (QImode, regt1, div_table_rtx));
  
-@@ -3967,7 +4031,7 @@ insert_wic_for_ilb_runout (rtx_insn *first)
+@@ -3976,7 +4040,7 @@ insert_wic_for_ilb_runout (rtx_insn *first)
                {
                  insn =
                    emit_insn_before (gen_iprefetch
@@ -508,7 +508,7 @@ index 1ac889041b8..9d3628c6816 100644
                                      before_4);
                  recog_memoized (insn);
                  INSN_LOCATION (insn) = INSN_LOCATION (before_4);
-@@ -3977,7 +4041,27 @@ insert_wic_for_ilb_runout (rtx_insn *first)
+@@ -3986,7 +4050,27 @@ insert_wic_for_ilb_runout (rtx_insn *first)
             }
         }
  }
@@ -537,7 +537,7 @@ index 1ac889041b8..9d3628c6816 100644
  /* Insert instruction prefetch instruction at the fall
     through path of the function call.  */
  
-@@ -4130,6 +4214,17 @@ microblaze_starting_frame_offset (void)
+@@ -4139,6 +4223,17 @@ microblaze_starting_frame_offset (void)
  #undef TARGET_LRA_P
  #define TARGET_LRA_P hook_bool_void_false
  
@@ -555,7 +555,7 @@ index 1ac889041b8..9d3628c6816 100644
  #undef TARGET_FRAME_POINTER_REQUIRED
  #define TARGET_FRAME_POINTER_REQUIRED  microblaze_frame_pointer_required
  
-@@ -4139,6 +4234,9 @@ microblaze_starting_frame_offset (void)
+@@ -4148,6 +4243,9 @@ microblaze_starting_frame_offset (void)
  #undef  TARGET_TRAMPOLINE_INIT
  #define TARGET_TRAMPOLINE_INIT         microblaze_trampoline_init
  
@@ -566,7 +566,7 @@ index 1ac889041b8..9d3628c6816 100644
  #define TARGET_PROMOTE_FUNCTION_MODE   default_promote_function_mode_always_promote
  
 diff --git a/gcc/config/microblaze/microblaze.h b/gcc/config/microblaze/microblaze.h
-index 885abc6e5a1..5f30b8ac195 100644
+index f35f7075ce3..3aee003de0d 100644
 --- a/gcc/config/microblaze/microblaze.h
 +++ b/gcc/config/microblaze/microblaze.h
 @@ -173,7 +173,6 @@ extern enum pipeline_type microblaze_pipe;
@@ -735,7 +735,7 @@ index 885abc6e5a1..5f30b8ac195 100644
  /* Default to -G 8 */
  #ifndef MICROBLAZE_DEFAULT_GVALUE
 diff --git a/gcc/config/microblaze/microblaze.md b/gcc/config/microblaze/microblaze.md
-index 40711fe224b..c99150ff0da 100644
+index 3f572fe2351..97da9aad6fd 100644
 --- a/gcc/config/microblaze/microblaze.md
 +++ b/gcc/config/microblaze/microblaze.md
 @@ -26,6 +26,7 @@
@@ -1795,7 +1795,7 @@ index 4c25cfe15e7..965132b3513 100644
  MULTILIB_EXCEPTIONS += mxl-multiply-high/m64
  MULTILIB_EXCEPTIONS += *mxl-multiply-high/mlittle-endian/m64
 diff --git a/libgcc/config/microblaze/crti.S b/libgcc/config/microblaze/crti.S
-index cbbe32d5f6a..ec797e1bf17 100644
+index 0f24adb750d..1a89a0a2ffa 100644
 --- a/libgcc/config/microblaze/crti.S
 +++ b/libgcc/config/microblaze/crti.S
 @@ -40,7 +40,7 @@
@@ -1815,7 +1815,7 @@ index cbbe32d5f6a..ec797e1bf17 100644
 +    addik   r1, r1, -16
      sw      r15, r0, r1
 diff --git a/libgcc/config/microblaze/crtn.S b/libgcc/config/microblaze/crtn.S
-index cb8d8ef2bfa..977b43b9436 100644
+index d38d7ab9f98..29a004973ae 100644
 --- a/libgcc/config/microblaze/crtn.S
 +++ b/libgcc/config/microblaze/crtn.S
 @@ -33,9 +33,9 @@
@@ -2438,5 +2438,5 @@ index 00000000000..7f5cd23f9a1
 +       .size   __umoddi3, . - __umoddi3
 +#endif
 -- 
-2.37.1 (Apple Git-137.1)
+2.34.1
 
diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-12/0029-Patch-MicroBlaze-re-arrangement-of-the-compare-branc.patch b/meta-microblaze/recipes-devtools/gcc/gcc-13/0029-re-arrangement-of-the-compare-branches.patch
index 26cdfca2..448e850f 100644
--- a/meta-microblaze/recipes-devtools/gcc/gcc-12/0029-Patch-MicroBlaze-re-arrangement-of-the-compare-branc.patch
+++ b/meta-microblaze/recipes-devtools/gcc/gcc-13/0029-re-arrangement-of-the-compare-branches.patch
@@ -1,8 +1,7 @@
-From 10d5e7d6cad5e7349b88b7469eb5ae20d87eb908 Mon Sep 17 00:00:00 2001
+From 870bfd716fcddeb72660f3176fb2a68aaa5ecc0e Mon Sep 17 00:00:00 2001
 From: Mahesh Bodapati <mbodapat@xilinx.com>
 Date: Tue, 13 Sep 2022 14:45:15 +0530
-Subject: [PATCH 29/53] [Patch,MicroBlaze] : re-arrangement of the compare
- branches
+Subject: [PATCH 29/54] re-arrangement of the compare branches
 
 ---
  gcc/config/microblaze/microblaze.cc |  28 ++----
@@ -10,10 +9,10 @@ Subject: [PATCH 29/53] [Patch,MicroBlaze] : re-arrangement of the compare
  2 files changed, 73 insertions(+), 96 deletions(-)
 
 diff --git a/gcc/config/microblaze/microblaze.cc b/gcc/config/microblaze/microblaze.cc
-index 9d3628c6816..4792e3ba370 100644
+index 46bbf8a21e7..de3c95a005e 100644
 --- a/gcc/config/microblaze/microblaze.cc
 +++ b/gcc/config/microblaze/microblaze.cc
-@@ -3698,11 +3698,7 @@ microblaze_expand_conditional_branch (machine_mode mode, rtx operands[])
+@@ -3707,11 +3707,7 @@ microblaze_expand_conditional_branch (machine_mode mode, rtx operands[])
      {
        comp_reg = cmp_op0;
        condition = gen_rtx_fmt_ee (signed_condition (code), mode, comp_reg, const0_rtx);
@@ -26,7 +25,7 @@ index 9d3628c6816..4792e3ba370 100644
      }
  
    else if (code == EQ || code == NE)
-@@ -3713,10 +3709,7 @@ microblaze_expand_conditional_branch (machine_mode mode, rtx operands[])
+@@ -3722,10 +3718,7 @@ microblaze_expand_conditional_branch (machine_mode mode, rtx operands[])
        else
          emit_insn (gen_xordi3 (comp_reg, cmp_op0, cmp_op1));
        condition = gen_rtx_fmt_ee (signed_condition (code), mode, comp_reg, const0_rtx);
@@ -38,7 +37,7 @@ index 9d3628c6816..4792e3ba370 100644
      }
    else
      {
-@@ -3749,10 +3742,7 @@ microblaze_expand_conditional_branch_reg (machine_mode mode, rtx operands[])
+@@ -3758,10 +3751,7 @@ microblaze_expand_conditional_branch_reg (machine_mode mode, rtx operands[])
        comp_reg = cmp_op0;
        condition = gen_rtx_fmt_ee (signed_condition (code),
                                    mode, comp_reg, const0_rtx);
@@ -50,7 +49,7 @@ index 9d3628c6816..4792e3ba370 100644
      }
    else if (code == EQ)
      {
-@@ -3767,10 +3757,7 @@ microblaze_expand_conditional_branch_reg (machine_mode mode, rtx operands[])
+@@ -3776,10 +3766,7 @@ microblaze_expand_conditional_branch_reg (machine_mode mode, rtx operands[])
                                             cmp_op1));
         }
        condition = gen_rtx_EQ (mode, comp_reg, const0_rtx);
@@ -62,7 +61,7 @@ index 9d3628c6816..4792e3ba370 100644
   
      }
    else if (code == NE)
-@@ -3786,10 +3773,7 @@ microblaze_expand_conditional_branch_reg (machine_mode mode, rtx operands[])
+@@ -3795,10 +3782,7 @@ microblaze_expand_conditional_branch_reg (machine_mode mode, rtx operands[])
                                             cmp_op1));
         }
        condition = gen_rtx_NE (mode, comp_reg, const0_rtx);
@@ -74,7 +73,7 @@ index 9d3628c6816..4792e3ba370 100644
      }
    else
      {
-@@ -3831,7 +3815,7 @@ microblaze_expand_conditional_branch_df (rtx operands[])
+@@ -3840,7 +3824,7 @@ microblaze_expand_conditional_branch_df (rtx operands[])
  
    emit_insn (gen_cstoredf4 (comp_reg, operands[0], cmp_op0, cmp_op1));
    condition = gen_rtx_NE (Pmode, comp_reg, const0_rtx);
@@ -84,7 +83,7 @@ index 9d3628c6816..4792e3ba370 100644
  
  /* Implement TARGET_FRAME_POINTER_REQUIRED.  */
 diff --git a/gcc/config/microblaze/microblaze.md b/gcc/config/microblaze/microblaze.md
-index c99150ff0da..566c53ba228 100644
+index 97da9aad6fd..31bf04e4abd 100644
 --- a/gcc/config/microblaze/microblaze.md
 +++ b/gcc/config/microblaze/microblaze.md
 @@ -2268,7 +2268,27 @@ else
@@ -265,5 +264,5 @@ index c99150ff0da..566c53ba228 100644
  ;; Unconditional branches
  ;;----------------------------------------------------------------
 -- 
-2.37.1 (Apple Git-137.1)
+2.34.1
 
diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-12/0030-Patch-Microblaze-previous-commit-broke-the-handling-.patch b/meta-microblaze/recipes-devtools/gcc/gcc-13/0030-previous-commit-broke-the-handling-of-SI-Branch-comp.patch
index 83d047cb..92951b08 100644
--- a/meta-microblaze/recipes-devtools/gcc/gcc-12/0030-Patch-Microblaze-previous-commit-broke-the-handling-.patch
+++ b/meta-microblaze/recipes-devtools/gcc/gcc-13/0030-previous-commit-broke-the-handling-of-SI-Branch-comp.patch
@@ -1,15 +1,15 @@
-From af910dd71faec99838e421dd76fd5231e34bee3e Mon Sep 17 00:00:00 2001
+From e4713a382c1e6729cd3228284def9fa59da70028 Mon Sep 17 00:00:00 2001
 From: Mahesh Bodapati <mbodapat@xilinx.com>
 Date: Wed, 8 Aug 2018 17:37:26 +0530
-Subject: [PATCH 30/53] [Patch,Microblaze] :  previous commit broke the
- handling of SI Branch compare for Microblaze 32-bit..
+Subject: [PATCH 30/54] previous commit broke the handling of SI Branch compare
+ for Microblaze 32-bit..
 
 ---
  gcc/config/microblaze/microblaze.md | 4 ++--
  1 file changed, 2 insertions(+), 2 deletions(-)
 
 diff --git a/gcc/config/microblaze/microblaze.md b/gcc/config/microblaze/microblaze.md
-index 566c53ba228..e54888550f6 100644
+index 31bf04e4abd..e37a7704195 100644
 --- a/gcc/config/microblaze/microblaze.md
 +++ b/gcc/config/microblaze/microblaze.md
 @@ -2224,8 +2224,8 @@ else
@@ -24,5 +24,5 @@ index 566c53ba228..e54888550f6 100644
                        (pc)))]
    ""
 -- 
-2.37.1 (Apple Git-137.1)
+2.34.1
 
diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-12/0031-Patch-Microblaze-Support-of-multilibs-with-m64.patch b/meta-microblaze/recipes-devtools/gcc/gcc-13/0031-Support-of-multilibs-with-m64.patch
index c230049c..40009bf0 100644
--- a/meta-microblaze/recipes-devtools/gcc/gcc-12/0031-Patch-Microblaze-Support-of-multilibs-with-m64.patch
+++ b/meta-microblaze/recipes-devtools/gcc/gcc-13/0031-Support-of-multilibs-with-m64.patch
@@ -1,7 +1,7 @@
-From 6921698fc0acf40cb036cf71649762e7a21bf604 Mon Sep 17 00:00:00 2001
+From 0673e986a5c06cba6507e0361ebdb9cf309f6a4c Mon Sep 17 00:00:00 2001
 From: Mahesh Bodapati <mbodapat@xilinx.com>
 Date: Tue, 11 Sep 2018 13:43:48 +0530
-Subject: [PATCH 31/53] [Patch, Microblaze] : Support of multilibs with m64 ...
+Subject: [PATCH 31/54] Support of multilibs with m64 ...
 
 Conflicts:
         gcc/config/microblaze/microblaze-c.c
@@ -14,7 +14,7 @@ signed-off-by : Mahesh Bodapati <mbodapat@xilinx.com>
  3 files changed, 10 insertions(+), 17 deletions(-)
 
 diff --git a/gcc/config/microblaze/microblaze-c.cc b/gcc/config/microblaze/microblaze-c.cc
-index ef8d2430565..4e83a84b112 100644
+index af73de0709c..c7cb139d25a 100644
 --- a/gcc/config/microblaze/microblaze-c.cc
 +++ b/gcc/config/microblaze/microblaze-c.cc
 @@ -102,6 +102,7 @@ microblaze_cpp_define (cpp_reader *pfile)
@@ -73,5 +73,5 @@ index 35021b24b7d..8d954a49575 100644
 -        $(srcdir)/config/microblaze/divsi3_table.c \
 +        $(srcdir)/config/microblaze/divsi3_table.c
 -- 
-2.37.1 (Apple Git-137.1)
+2.34.1
 
diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-12/0032-Patch-MicroBlaze-Fixed-issues-like.patch b/meta-microblaze/recipes-devtools/gcc/gcc-13/0032-Fixed-issues-like-1-Interrupt-alignment-issue-2-Sign.patch
index 36a20450..df7ef8da 100644
--- a/meta-microblaze/recipes-devtools/gcc/gcc-12/0032-Patch-MicroBlaze-Fixed-issues-like.patch
+++ b/meta-microblaze/recipes-devtools/gcc/gcc-13/0032-Fixed-issues-like-1-Interrupt-alignment-issue-2-Sign.patch
@@ -1,8 +1,8 @@
-From 7f827e73dff27c764e5f475613e3e06ae546103f Mon Sep 17 00:00:00 2001
+From 63e3adfb493e225c55536e72cfbf8be70977cdc8 Mon Sep 17 00:00:00 2001
 From: Mahesh Bodapati <mbodapat@xilinx.com>
 Date: Tue, 13 Sep 2022 15:24:25 +0530
-Subject: [PATCH 32/53] [Patch,MicroBlaze]: Fixed issues like:     1 Interrupt
- alignment issue     2 Sign extension issue
+Subject: [PATCH 32/54] Fixed issues like: 1 Interrupt alignment issue 2 Sign
+ extension issue
 
 ---
  gcc/config/microblaze/microblaze.cc | 16 ++++++++++------
@@ -10,10 +10,10 @@ Subject: [PATCH 32/53] [Patch,MicroBlaze]: Fixed issues like:     1 Interrupt
  2 files changed, 11 insertions(+), 7 deletions(-)
 
 diff --git a/gcc/config/microblaze/microblaze.cc b/gcc/config/microblaze/microblaze.cc
-index 4792e3ba370..f1da145232a 100644
+index de3c95a005e..6fbecb43e4a 100644
 --- a/gcc/config/microblaze/microblaze.cc
 +++ b/gcc/config/microblaze/microblaze.cc
-@@ -2178,9 +2178,14 @@ compute_frame_size (HOST_WIDE_INT size)
+@@ -2183,9 +2183,14 @@ compute_frame_size (HOST_WIDE_INT size)
  
    total_size += gp_reg_size;
  
@@ -30,7 +30,7 @@ index 4792e3ba370..f1da145232a 100644
  
    /* No space to be allocated for link register in leaf functions with no other
       stack requirements.  */
-@@ -2465,7 +2470,6 @@ print_operand (FILE * file, rtx op, int letter)
+@@ -2470,7 +2475,6 @@ print_operand (FILE * file, rtx op, int letter)
    else if (letter == 'h' || letter == 'j')
      {
        long val[2];
@@ -38,7 +38,7 @@ index 4792e3ba370..f1da145232a 100644
        long l[2];
        if (code == CONST_DOUBLE)
         {
-@@ -2480,10 +2484,10 @@ print_operand (FILE * file, rtx op, int letter)
+@@ -2485,10 +2489,10 @@ print_operand (FILE * file, rtx op, int letter)
         }
        else if (code == CONST_INT || code == CONST)// || code == SYMBOL_REF ||code == LABEL_REF)
          {
@@ -53,7 +53,7 @@ index 4792e3ba370..f1da145232a 100644
    else if (code == CONST_DOUBLE)
      {
 diff --git a/gcc/config/microblaze/microblaze.md b/gcc/config/microblaze/microblaze.md
-index e54888550f6..4e5d21a1f4c 100644
+index e37a7704195..72c2a9a38cd 100644
 --- a/gcc/config/microblaze/microblaze.md
 +++ b/gcc/config/microblaze/microblaze.md
 @@ -1096,7 +1096,7 @@
@@ -66,5 +66,5 @@ index e54888550f6..4e5d21a1f4c 100644
          }
      } 
 -- 
-2.37.1 (Apple Git-137.1)
+2.34.1
 
diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-12/0033-Patch-MicroBlaze.patch b/meta-microblaze/recipes-devtools/gcc/gcc-13/0033-fixed-below-issues-Floating-point-print-issues-in-64.patch
index 9c9e4dd2..cf1076ea 100644
--- a/meta-microblaze/recipes-devtools/gcc/gcc-12/0033-Patch-MicroBlaze.patch
+++ b/meta-microblaze/recipes-devtools/gcc/gcc-13/0033-fixed-below-issues-Floating-point-print-issues-in-64.patch
@@ -1,9 +1,8 @@
-From 0a86428a345ed359f788a72a0e185053b598e908 Mon Sep 17 00:00:00 2001
+From 58d4d2ca4fdf90d9d21e7813a599b3491f52e34d Mon Sep 17 00:00:00 2001
 From: Mahesh Bodapati <mbodapat@xilinx.com>
 Date: Tue, 13 Sep 2022 15:28:58 +0530
-Subject: [PATCH 33/53] [Patch,MicroBlaze]: fixed below issues:     - Floating
- point print issues in 64bit mode     - Dejagnu Jump related issues     -
- Added dbl instruction
+Subject: [PATCH 33/54] fixed below issues: - Floating point print issues in
+ 64bit mode - Dejagnu Jump related issues - Added dbl instruction
 
     Conflicts:
         gcc/config/microblaze/microblaze.md
@@ -16,10 +15,10 @@ Subject: [PATCH 33/53] [Patch,MicroBlaze]: fixed below issues:     - Floating
  5 files changed, 125 insertions(+), 17 deletions(-)
 
 diff --git a/gcc/config/microblaze/microblaze.cc b/gcc/config/microblaze/microblaze.cc
-index f1da145232a..7a08390a027 100644
+index 6fbecb43e4a..965a041ea8c 100644
 --- a/gcc/config/microblaze/microblaze.cc
 +++ b/gcc/config/microblaze/microblaze.cc
-@@ -2474,7 +2474,12 @@ print_operand (FILE * file, rtx op, int letter)
+@@ -2479,7 +2479,12 @@ print_operand (FILE * file, rtx op, int letter)
        if (code == CONST_DOUBLE)
         {
           if (GET_MODE (op) == DFmode)
@@ -33,7 +32,7 @@ index f1da145232a..7a08390a027 100644
           else
             {
               REAL_VALUE_TO_TARGET_DOUBLE (*CONST_DOUBLE_REAL_VALUE (op), l);
-@@ -3877,7 +3882,10 @@ microblaze_expand_divide (rtx operands[])
+@@ -3886,7 +3891,10 @@ microblaze_expand_divide (rtx operands[])
                              gen_rtx_PLUS (QImode, regt1, div_table_rtx));
  
    insn = emit_insn (gen_zero_extendqisi2(operands[0],mem_rtx));
@@ -46,7 +45,7 @@ index f1da145232a..7a08390a027 100644
    LABEL_NUSES (div_end_label) = 1; 
    emit_barrier ();
 diff --git a/gcc/config/microblaze/microblaze.h b/gcc/config/microblaze/microblaze.h
-index 5f30b8ac195..ac4ea43a706 100644
+index 3aee003de0d..145368db8b8 100644
 --- a/gcc/config/microblaze/microblaze.h
 +++ b/gcc/config/microblaze/microblaze.h
 @@ -888,10 +888,17 @@ do {                                                                       \
@@ -68,7 +67,7 @@ index 5f30b8ac195..ac4ea43a706 100644
  /* We need to group -lm as well, since some Newlib math functions 
     reference __errno!  */
 diff --git a/gcc/config/microblaze/microblaze.md b/gcc/config/microblaze/microblaze.md
-index 4e5d21a1f4c..5a950b49591 100644
+index 72c2a9a38cd..b3d265d9941 100644
 --- a/gcc/config/microblaze/microblaze.md
 +++ b/gcc/config/microblaze/microblaze.md
 @@ -527,6 +527,15 @@
@@ -229,7 +228,7 @@ index 4e5d21a1f4c..5a950b49591 100644
    ""
    "mfs\t%0,rpc\n\taddik\t%0,%0,_GLOBAL_OFFSET_TABLE_+8"
 diff --git a/libgcc/config/microblaze/crti.S b/libgcc/config/microblaze/crti.S
-index ec797e1bf17..15ebe68c277 100644
+index 1a89a0a2ffa..7cf5664880b 100644
 --- a/libgcc/config/microblaze/crti.S
 +++ b/libgcc/config/microblaze/crti.S
 @@ -33,11 +33,32 @@
@@ -272,7 +271,7 @@ index ec797e1bf17..15ebe68c277 100644
      sw      r15, r0, r1
 +#endif
 diff --git a/libgcc/config/microblaze/crtn.S b/libgcc/config/microblaze/crtn.S
-index 977b43b9436..9de3d4de13c 100644
+index 29a004973ae..9697b247b6c 100644
 --- a/libgcc/config/microblaze/crtn.S
 +++ b/libgcc/config/microblaze/crtn.S
 @@ -29,7 +29,19 @@
@@ -301,5 +300,5 @@ index 977b43b9436..9de3d4de13c 100644
      addik   r1, r1, 16   
 +#endif
 -- 
-2.37.1 (Apple Git-137.1)
+2.34.1
 
diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-12/0034-Added-double-arith-instructions.patch b/meta-microblaze/recipes-devtools/gcc/gcc-13/0034-Added-double-arith-instructions-Fixed-prologue-stack.patch
index 7bd3001d..ab50b599 100644
--- a/meta-microblaze/recipes-devtools/gcc/gcc-12/0034-Added-double-arith-instructions.patch
+++ b/meta-microblaze/recipes-devtools/gcc/gcc-13/0034-Added-double-arith-instructions-Fixed-prologue-stack.patch
@@ -1,7 +1,7 @@
-From 80c16e39bdf8643184c353e34f146dc8601c2c1e Mon Sep 17 00:00:00 2001
+From 924a756b5c9edc5d626f68323f67ced2800c75ff Mon Sep 17 00:00:00 2001
 From: Nagaraju Mekala <nmekala@xilix.com>
 Date: Tue, 9 Oct 2018 10:07:08 +0530
-Subject: [PATCH 34/53] -Added double arith instructions -Fixed prologue stack
+Subject: [PATCH 34/54] -Added double arith instructions -Fixed prologue stack
  pointer decrement issue
 
 ---
@@ -10,7 +10,7 @@ Subject: [PATCH 34/53] -Added double arith instructions -Fixed prologue stack
  2 files changed, 76 insertions(+), 9 deletions(-)
 
 diff --git a/gcc/config/microblaze/microblaze.md b/gcc/config/microblaze/microblaze.md
-index 5a950b49591..5506aee7be5 100644
+index b3d265d9941..0f769f320b2 100644
 --- a/gcc/config/microblaze/microblaze.md
 +++ b/gcc/config/microblaze/microblaze.md
 @@ -527,6 +527,66 @@
@@ -131,5 +131,5 @@ index 47b869b9303..3522afd4831 100644
  MULTILIB_EXCEPTIONS += *mlittle-endian/mxl-multiply-high mxl-multiply-high
  MULTILIB_EXCEPTIONS += *m64/mxl-barrel-shift/mlittle-endian/mxl-multiply-high
 -- 
-2.37.1 (Apple Git-137.1)
+2.34.1
 
diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-12/0035-Fixed-the-issue-in-the-delay-slot-with-swap-instruct.patch b/meta-microblaze/recipes-devtools/gcc/gcc-13/0035-Fixed-the-issue-in-the-delay-slot-with-swap-instruct.patch
index 89018aae..589ca998 100644
--- a/meta-microblaze/recipes-devtools/gcc/gcc-12/0035-Fixed-the-issue-in-the-delay-slot-with-swap-instruct.patch
+++ b/meta-microblaze/recipes-devtools/gcc/gcc-13/0035-Fixed-the-issue-in-the-delay-slot-with-swap-instruct.patch
@@ -1,7 +1,7 @@
-From 455216291580ca22767433eec11941c5f2471892 Mon Sep 17 00:00:00 2001
+From 3ebc7f9a11d66843982544cd0f88f35cc4defb83 Mon Sep 17 00:00:00 2001
 From: Nagaraju Mekala <nmekala@xilix.com>
 Date: Fri, 12 Oct 2018 16:07:36 +0530
-Subject: [PATCH 35/53] Fixed the issue in the delay slot with swap
+Subject: [PATCH 35/54] Fixed the issue in the delay slot with swap
  instructions
 
 ---
@@ -9,7 +9,7 @@ Subject: [PATCH 35/53] Fixed the issue in the delay slot with swap
  1 file changed, 6 insertions(+)
 
 diff --git a/gcc/config/microblaze/microblaze.md b/gcc/config/microblaze/microblaze.md
-index 5506aee7be5..4a372f8fd3f 100644
+index 0f769f320b2..6ada55ac2bc 100644
 --- a/gcc/config/microblaze/microblaze.md
 +++ b/gcc/config/microblaze/microblaze.md
 @@ -443,6 +443,9 @@
@@ -33,5 +33,5 @@ index 5506aee7be5..4a372f8fd3f 100644
  
  ;;----------------------------------------------------------------
 -- 
-2.37.1 (Apple Git-137.1)
+2.34.1
 
diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-12/0036-Fixed-the-load-store-issue-with-the-32bit-arith-libr.patch b/meta-microblaze/recipes-devtools/gcc/gcc-13/0036-Fixed-the-load-store-issue-with-the-32bit-arith-libr.patch
index 0c27d69f..8431cb16 100644
--- a/meta-microblaze/recipes-devtools/gcc/gcc-12/0036-Fixed-the-load-store-issue-with-the-32bit-arith-libr.patch
+++ b/meta-microblaze/recipes-devtools/gcc/gcc-13/0036-Fixed-the-load-store-issue-with-the-32bit-arith-libr.patch
@@ -1,7 +1,7 @@
-From b8c468f1bd467213083b59b54af100ee0c6dea9e Mon Sep 17 00:00:00 2001
+From 9ea2aee3599d2f1fc9d67c7a72cd7c826272a2fa Mon Sep 17 00:00:00 2001
 From: Nagaraju Mekala <nmekala@xilix.com>
 Date: Sat, 13 Oct 2018 21:12:43 +0530
-Subject: [PATCH 36/53] Fixed the load store issue with the 32bit arith
+Subject: [PATCH 36/54] Fixed the load store issue with the 32bit arith
  libraries
 
 ---
@@ -13,7 +13,7 @@ Subject: [PATCH 36/53] Fixed the load store issue with the 32bit arith
  5 files changed, 98 insertions(+), 4 deletions(-)
 
 diff --git a/libgcc/config/microblaze/divsi3.S b/libgcc/config/microblaze/divsi3.S
-index 14829ec6701..b464deed481 100644
+index a449fedd53e..9f04f59104e 100644
 --- a/libgcc/config/microblaze/divsi3.S
 +++ b/libgcc/config/microblaze/divsi3.S
 @@ -41,6 +41,17 @@
@@ -70,7 +70,7 @@ index 14829ec6701..b464deed481 100644
         .size   __divsi3, . - __divsi3
  
 diff --git a/libgcc/config/microblaze/modsi3.S b/libgcc/config/microblaze/modsi3.S
-index b8f2e37809d..e0fbd91e766 100644
+index 282fabfd966..d2f9dc770e4 100644
 --- a/libgcc/config/microblaze/modsi3.S
 +++ b/libgcc/config/microblaze/modsi3.S
 @@ -41,6 +41,17 @@
@@ -128,7 +128,7 @@ index b8f2e37809d..e0fbd91e766 100644
         .size   __modsi3, . - __modsi3
  
 diff --git a/libgcc/config/microblaze/mulsi3.S b/libgcc/config/microblaze/mulsi3.S
-index f48fcf8270c..657668ef826 100644
+index 3da55416964..437e2bc309e 100644
 --- a/libgcc/config/microblaze/mulsi3.S
 +++ b/libgcc/config/microblaze/mulsi3.S
 @@ -41,6 +41,9 @@
@@ -142,7 +142,7 @@ index f48fcf8270c..657668ef826 100644
         .frame  r1,0,r15
         add     r3,r0,r0
 diff --git a/libgcc/config/microblaze/udivsi3.S b/libgcc/config/microblaze/udivsi3.S
-index 2c321f94b09..fc6a4b5a248 100644
+index 7f3fe99eb12..496dd6794bf 100644
 --- a/libgcc/config/microblaze/udivsi3.S
 +++ b/libgcc/config/microblaze/udivsi3.S
 @@ -41,6 +41,16 @@
@@ -197,7 +197,7 @@ index 2c321f94b09..fc6a4b5a248 100644
          .end __udivsi3
         .size   __udivsi3, . - __udivsi3
 diff --git a/libgcc/config/microblaze/umodsi3.S b/libgcc/config/microblaze/umodsi3.S
-index fbe942dc5f2..b68ba7a5ea6 100644
+index 6c7f2b3c917..fffc784b4cb 100644
 --- a/libgcc/config/microblaze/umodsi3.S
 +++ b/libgcc/config/microblaze/umodsi3.S
 @@ -41,6 +41,16 @@
@@ -252,5 +252,5 @@ index fbe942dc5f2..b68ba7a5ea6 100644
  .end __umodsi3
         .size   __umodsi3, . - __umodsi3
 -- 
-2.37.1 (Apple Git-137.1)
+2.34.1
 
diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-12/0037-extending-the-Dwarf-support-to-64bit-Microblaze.patch b/meta-microblaze/recipes-devtools/gcc/gcc-13/0037-extending-the-Dwarf-support-to-64bit-Microblaze.patch
index 2eab03ec..8b0fa208 100644
--- a/meta-microblaze/recipes-devtools/gcc/gcc-12/0037-extending-the-Dwarf-support-to-64bit-Microblaze.patch
+++ b/meta-microblaze/recipes-devtools/gcc/gcc-13/0037-extending-the-Dwarf-support-to-64bit-Microblaze.patch
@@ -1,14 +1,14 @@
-From 2bc476e64f1bacc27874c152340c004c17bfd942 Mon Sep 17 00:00:00 2001
+From d2c971646ce103fa17cc32474cb942268bc59258 Mon Sep 17 00:00:00 2001
 From: Nagaraju Mekala <nmekala@xilix.com>
 Date: Mon, 15 Oct 2018 12:00:10 +0530
-Subject: [PATCH 37/53] extending the Dwarf support to 64bit Microblaze
+Subject: [PATCH 37/54] extending the Dwarf support to 64bit Microblaze
 
 ---
  gcc/config/microblaze/microblaze.h | 2 +-
  1 file changed, 1 insertion(+), 1 deletion(-)
 
 diff --git a/gcc/config/microblaze/microblaze.h b/gcc/config/microblaze/microblaze.h
-index ac4ea43a706..56dfc2a3824 100644
+index 145368db8b8..4258dcde0d1 100644
 --- a/gcc/config/microblaze/microblaze.h
 +++ b/gcc/config/microblaze/microblaze.h
 @@ -207,7 +207,7 @@ extern enum pipeline_type microblaze_pipe;
@@ -21,5 +21,5 @@ index ac4ea43a706..56dfc2a3824 100644
  /* Target machine storage layout */
  
 -- 
-2.37.1 (Apple Git-137.1)
+2.34.1
 
diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-12/0038-fixing-the-typo-errors-in-umodsi3-file.patch b/meta-microblaze/recipes-devtools/gcc/gcc-13/0038-fixing-the-typo-errors-in-umodsi3-file.patch
index 4d6be758..d7b78895 100644
--- a/meta-microblaze/recipes-devtools/gcc/gcc-12/0038-fixing-the-typo-errors-in-umodsi3-file.patch
+++ b/meta-microblaze/recipes-devtools/gcc/gcc-13/0038-fixing-the-typo-errors-in-umodsi3-file.patch
@@ -1,14 +1,14 @@
-From 1e0eaa1330f24d4989af6326ce1af4f613ea0d89 Mon Sep 17 00:00:00 2001
+From 0c0b4fb378d9035f0c5f847321b543a5c2ff70e2 Mon Sep 17 00:00:00 2001
 From: Nagaraju Mekala <nmekala@xilix.com>
 Date: Tue, 16 Oct 2018 07:55:46 +0530
-Subject: [PATCH 38/53] fixing the typo errors in umodsi3 file
+Subject: [PATCH 38/54] fixing the typo errors in umodsi3 file
 
 ---
  libgcc/config/microblaze/umodsi3.S | 6 +++---
  1 file changed, 3 insertions(+), 3 deletions(-)
 
 diff --git a/libgcc/config/microblaze/umodsi3.S b/libgcc/config/microblaze/umodsi3.S
-index b68ba7a5ea6..03be6df1fc6 100644
+index fffc784b4cb..a706017c634 100644
 --- a/libgcc/config/microblaze/umodsi3.S
 +++ b/libgcc/config/microblaze/umodsi3.S
 @@ -47,9 +47,9 @@ __umodsi3:
@@ -25,5 +25,5 @@ index b68ba7a5ea6..03be6df1fc6 100644
  __umodsi3:
         .frame  r1,0,r15        
 -- 
-2.37.1 (Apple Git-137.1)
+2.34.1
 
diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-12/0039-fixing-the-32bit-LTO-related-issue9-1014024.patch b/meta-microblaze/recipes-devtools/gcc/gcc-13/0039-fixing-the-32bit-LTO-related-issue9-1014024.patch
index 1a5a0ef7..27b6efd1 100644
--- a/meta-microblaze/recipes-devtools/gcc/gcc-12/0039-fixing-the-32bit-LTO-related-issue9-1014024.patch
+++ b/meta-microblaze/recipes-devtools/gcc/gcc-13/0039-fixing-the-32bit-LTO-related-issue9-1014024.patch
@@ -1,14 +1,14 @@
-From 7dbdc5ba78c9237b0a367ca61f448cf3a0277ea6 Mon Sep 17 00:00:00 2001
+From 8dfc5e76a3b0388bb5c88c5c0072256f3062f3c8 Mon Sep 17 00:00:00 2001
 From: Nagaraju Mekala <nmekala@xilix.com>
 Date: Wed, 17 Oct 2018 16:56:14 +0530
-Subject: [PATCH 39/53] fixing the 32bit LTO related issue9(1014024)
+Subject: [PATCH 39/54] fixing the 32bit LTO related issue9(1014024)
 
 ---
  gcc/config/microblaze/microblaze.h | 24 ++++++++++++++----------
  1 file changed, 14 insertions(+), 10 deletions(-)
 
 diff --git a/gcc/config/microblaze/microblaze.h b/gcc/config/microblaze/microblaze.h
-index 56dfc2a3824..c48b6de0d58 100644
+index 4258dcde0d1..4d6babfe9c4 100644
 --- a/gcc/config/microblaze/microblaze.h
 +++ b/gcc/config/microblaze/microblaze.h
 @@ -265,12 +265,14 @@ extern enum pipeline_type microblaze_pipe;
@@ -64,5 +64,5 @@ index 56dfc2a3824..c48b6de0d58 100644
  #define REGNO_OK_FOR_BASE_P(regno)             microblaze_regno_ok_for_base_p ((regno), 1)
  
 -- 
-2.37.1 (Apple Git-137.1)
+2.34.1
 
diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-12/0040-Fixed-the-missing-stack-adjustment-in-prologue-of-mo.patch b/meta-microblaze/recipes-devtools/gcc/gcc-13/0040-Fixed-the-missing-stack-adjustment-in-prologue-of-mo.patch
index 7c6f9008..35251ff8 100644
--- a/meta-microblaze/recipes-devtools/gcc/gcc-12/0040-Fixed-the-missing-stack-adjustment-in-prologue-of-mo.patch
+++ b/meta-microblaze/recipes-devtools/gcc/gcc-13/0040-Fixed-the-missing-stack-adjustment-in-prologue-of-mo.patch
@@ -1,7 +1,7 @@
-From a21a41a0c574b807c7e7edaa7051a0f7395d8142 Mon Sep 17 00:00:00 2001
+From 411324e0340a32b4a84094b38e5d74f38cf391bc Mon Sep 17 00:00:00 2001
 From: Nagaraju Mekala <nmekala@xilix.com>
 Date: Fri, 19 Oct 2018 14:26:25 +0530
-Subject: [PATCH 40/53] Fixed the missing stack adjustment in prologue of
+Subject: [PATCH 40/54] Fixed the missing stack adjustment in prologue of
  modsi3 function
 
 ---
@@ -9,7 +9,7 @@ Subject: [PATCH 40/53] Fixed the missing stack adjustment in prologue of
  1 file changed, 1 insertion(+)
 
 diff --git a/libgcc/config/microblaze/modsi3.S b/libgcc/config/microblaze/modsi3.S
-index e0fbd91e766..3ec17685e51 100644
+index d2f9dc770e4..f8684db721e 100644
 --- a/libgcc/config/microblaze/modsi3.S
 +++ b/libgcc/config/microblaze/modsi3.S
 @@ -119,6 +119,7 @@ $LaRETURN_HERE:
@@ -21,5 +21,5 @@ index e0fbd91e766..3ec17685e51 100644
          .end __modsi3
         .size   __modsi3, . - __modsi3
 -- 
-2.37.1 (Apple Git-137.1)
+2.34.1
 
diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-12/0041-Patch-Microblaze-corrected-SPN-for-dlong-instruction.patch b/meta-microblaze/recipes-devtools/gcc/gcc-13/0041-corrected-SPN-for-dlong-instruction-mapping.patch
index 9cec7be9..bb797a4a 100644
--- a/meta-microblaze/recipes-devtools/gcc/gcc-12/0041-Patch-Microblaze-corrected-SPN-for-dlong-instruction.patch
+++ b/meta-microblaze/recipes-devtools/gcc/gcc-13/0041-corrected-SPN-for-dlong-instruction-mapping.patch
@@ -1,15 +1,14 @@
-From 5f799ea01bae0573a44f3fefa825861e99f4e30a Mon Sep 17 00:00:00 2001
+From b03e3a75a37213823c062bb72e4f6f470c516222 Mon Sep 17 00:00:00 2001
 From: Mahesh Bodapati <mbodapat@xilinx.com>
 Date: Wed, 24 Oct 2018 18:31:04 +0530
-Subject: [PATCH 41/53] [Patch,Microblaze] : corrected SPN for dlong
- instruction mapping.
+Subject: [PATCH 41/54] corrected SPN for dlong instruction mapping.
 
 ---
  gcc/config/microblaze/microblaze.md | 4 ++--
  1 file changed, 2 insertions(+), 2 deletions(-)
 
 diff --git a/gcc/config/microblaze/microblaze.md b/gcc/config/microblaze/microblaze.md
-index 4a372f8fd3f..5a964e70d1f 100644
+index 6ada55ac2bc..36b050670b8 100644
 --- a/gcc/config/microblaze/microblaze.md
 +++ b/gcc/config/microblaze/microblaze.md
 @@ -602,9 +602,9 @@
@@ -25,5 +24,5 @@ index 4a372f8fd3f..5a964e70d1f 100644
    "dlong\t%0,%1"
    [(set_attr "type"     "fcvt")
 -- 
-2.37.1 (Apple Git-137.1)
+2.34.1
 
diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-12/0042-fixing-the-long-long-long-mingw-toolchain-issue.patch b/meta-microblaze/recipes-devtools/gcc/gcc-13/0042-fixing-the-long-long-long-mingw-toolchain-issue.patch
index 8836d0e7..cbafaafc 100644
--- a/meta-microblaze/recipes-devtools/gcc/gcc-12/0042-fixing-the-long-long-long-mingw-toolchain-issue.patch
+++ b/meta-microblaze/recipes-devtools/gcc/gcc-13/0042-fixing-the-long-long-long-mingw-toolchain-issue.patch
@@ -1,7 +1,7 @@
-From 9c37b9690ec2c6290095209c039725f235537379 Mon Sep 17 00:00:00 2001
+From b926d05a0cdd32d9821a48f62eef49c5b1025f73 Mon Sep 17 00:00:00 2001
 From: Nagaraju Mekala <nmekala@xilix.com>
 Date: Thu, 29 Nov 2018 17:55:08 +0530
-Subject: [PATCH 42/53] fixing the long & long long mingw toolchain issue
+Subject: [PATCH 42/54] fixing the long & long long mingw toolchain issue
 
 ---
  gcc/config/microblaze/constraints.md | 2 +-
@@ -9,7 +9,7 @@ Subject: [PATCH 42/53] fixing the long & long long mingw toolchain issue
  2 files changed, 5 insertions(+), 5 deletions(-)
 
 diff --git a/gcc/config/microblaze/constraints.md b/gcc/config/microblaze/constraints.md
-index 0ced155340d..3f9805dfe0a 100644
+index 7bb1e0b4c8d..fa605831bfe 100644
 --- a/gcc/config/microblaze/constraints.md
 +++ b/gcc/config/microblaze/constraints.md
 @@ -55,7 +55,7 @@
@@ -22,7 +22,7 @@ index 0ced155340d..3f9805dfe0a 100644
  
  ;; Define floating point constraints
 diff --git a/gcc/config/microblaze/microblaze.md b/gcc/config/microblaze/microblaze.md
-index 5a964e70d1f..f509bd5e665 100644
+index 36b050670b8..e123bf3a7d1 100644
 --- a/gcc/config/microblaze/microblaze.md
 +++ b/gcc/config/microblaze/microblaze.md
 @@ -648,8 +648,8 @@
@@ -55,5 +55,5 @@ index 5a964e70d1f..f509bd5e665 100644
          else   
           return "addlik\t%0,r0,%1";
 -- 
-2.37.1 (Apple Git-137.1)
+2.34.1
 
diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-12/0043-Fix-the-MB-64-bug-of-handling-QI-objects.patch b/meta-microblaze/recipes-devtools/gcc/gcc-13/0043-Fix-the-MB-64-bug-of-handling-QI-objects.patch
index c8caff29..af8c684f 100644
--- a/meta-microblaze/recipes-devtools/gcc/gcc-12/0043-Fix-the-MB-64-bug-of-handling-QI-objects.patch
+++ b/meta-microblaze/recipes-devtools/gcc/gcc-13/0043-Fix-the-MB-64-bug-of-handling-QI-objects.patch
@@ -1,14 +1,14 @@
-From 0ed24f5a2e6e47f5d13896793ab2c6ea89e8c8e6 Mon Sep 17 00:00:00 2001
+From 854371934116e5197d627cebaf274f431205b914 Mon Sep 17 00:00:00 2001
 From: Nagaraju <nmekala@xilinx.com>
 Date: Thu, 14 Mar 2019 18:11:04 +0530
-Subject: [PATCH 43/53] Fix the MB-64 bug of handling QI objects
+Subject: [PATCH 43/54] Fix the MB-64 bug of handling QI objects
 
 ---
  gcc/config/microblaze/microblaze.md | 14 +++++++-------
  1 file changed, 7 insertions(+), 7 deletions(-)
 
 diff --git a/gcc/config/microblaze/microblaze.md b/gcc/config/microblaze/microblaze.md
-index f509bd5e665..27436c0f660 100644
+index e123bf3a7d1..0f81b0ed58c 100644
 --- a/gcc/config/microblaze/microblaze.md
 +++ b/gcc/config/microblaze/microblaze.md
 @@ -2345,11 +2345,11 @@ else
@@ -43,5 +43,5 @@ index f509bd5e665..27436c0f660 100644
    "TARGET_MB_64"
    {
 -- 
-2.37.1 (Apple Git-137.1)
+2.34.1
 
diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-12/0044-Patch-Microblaze-We-will-check-the-possibility-of-pe.patch b/meta-microblaze/recipes-devtools/gcc/gcc-13/0044-We-will-check-the-possibility-of-peephole2-optimizat.patch
index e0d7df3d..277e5be2 100644
--- a/meta-microblaze/recipes-devtools/gcc/gcc-12/0044-Patch-Microblaze-We-will-check-the-possibility-of-pe.patch
+++ b/meta-microblaze/recipes-devtools/gcc/gcc-13/0044-We-will-check-the-possibility-of-peephole2-optimizat.patch
@@ -1,15 +1,15 @@
-From e8286e00f939486dde52e9475bc9cca0aa025a42 Mon Sep 17 00:00:00 2001
+From 5527cec8136440a1edea87b2bb6dafa8e78d07b0 Mon Sep 17 00:00:00 2001
 From: Mahesh Bodapati <mbodapat@xilinx.com>
 Date: Fri, 29 Mar 2019 12:08:39 +0530
-Subject: [PATCH 44/53] [Patch,Microblaze] : We will check the possibility of
- peephole2 optimization,if we can then we will fix the compiler issue.
+Subject: [PATCH 44/54] We will check the possibility of peephole2
+ optimization,if we can then we will fix the compiler issue.
 
 ---
  gcc/config/microblaze/microblaze.md | 63 +++++++++++++++++------------
  1 file changed, 38 insertions(+), 25 deletions(-)
 
 diff --git a/gcc/config/microblaze/microblaze.md b/gcc/config/microblaze/microblaze.md
-index 27436c0f660..4b9acddb1f1 100644
+index 0f81b0ed58c..f661ba1c241 100644
 --- a/gcc/config/microblaze/microblaze.md
 +++ b/gcc/config/microblaze/microblaze.md
 @@ -882,31 +882,44 @@
@@ -83,5 +83,5 @@ index 27436c0f660..4b9acddb1f1 100644
  ;;----------------------------------------------------------------
  ;; Negation and one's complement
 -- 
-2.37.1 (Apple Git-137.1)
+2.34.1
 
diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-12/0045-Patch-MicroBlaze-fixed-typos-in-mul-div-and-mod-asse.patch b/meta-microblaze/recipes-devtools/gcc/gcc-13/0045-fixed-typos-in-mul-div-and-mod-assembly-files.patch
index 770d0f70..4760926f 100644
--- a/meta-microblaze/recipes-devtools/gcc/gcc-12/0045-Patch-MicroBlaze-fixed-typos-in-mul-div-and-mod-asse.patch
+++ b/meta-microblaze/recipes-devtools/gcc/gcc-13/0045-fixed-typos-in-mul-div-and-mod-assembly-files.patch
@@ -1,8 +1,7 @@
-From 29c33e35373d7dc52e43162dce38a3ec0e350db3 Mon Sep 17 00:00:00 2001
+From 3c6f051ce41f06eab29932859be52ed864bef52f Mon Sep 17 00:00:00 2001
 From: Mahesh Bodapati <mbodapat@xilinx.com>
 Date: Wed, 17 Apr 2019 12:36:16 +0530
-Subject: [PATCH 45/53] [Patch,MicroBlaze]: fixed typos in mul,div and mod
- assembly files.
+Subject: [PATCH 45/54] fixed typos in mul,div and mod assembly files.
 
 ---
  libgcc/config/microblaze/divsi3.S  | 47 ++++++++++++++++++++----
@@ -13,7 +12,7 @@ Subject: [PATCH 45/53] [Patch,MicroBlaze]: fixed typos in mul,div and mod
  5 files changed, 212 insertions(+), 20 deletions(-)
 
 diff --git a/libgcc/config/microblaze/divsi3.S b/libgcc/config/microblaze/divsi3.S
-index b464deed481..ceeed6be1f4 100644
+index 9f04f59104e..e1dfccbf257 100644
 --- a/libgcc/config/microblaze/divsi3.S
 +++ b/libgcc/config/microblaze/divsi3.S
 @@ -46,7 +46,7 @@
@@ -107,7 +106,7 @@ index b464deed481..ceeed6be1f4 100644
  $LaDiv_By_Zero:
  $LaResult_Is_Zero:
 diff --git a/libgcc/config/microblaze/modsi3.S b/libgcc/config/microblaze/modsi3.S
-index 3ec17685e51..637b06c09a3 100644
+index f8684db721e..3bf9b10ec3e 100644
 --- a/libgcc/config/microblaze/modsi3.S
 +++ b/libgcc/config/microblaze/modsi3.S
 @@ -62,40 +62,72 @@ __modsi3:
@@ -196,7 +195,7 @@ index 3ec17685e51..637b06c09a3 100644
         nop
  #else
 diff --git a/libgcc/config/microblaze/mulsi3.S b/libgcc/config/microblaze/mulsi3.S
-index 657668ef826..6be75dc95e8 100644
+index 437e2bc309e..bc9ff9cdc89 100644
 --- a/libgcc/config/microblaze/mulsi3.S
 +++ b/libgcc/config/microblaze/mulsi3.S
 @@ -43,7 +43,37 @@
@@ -246,7 +245,7 @@ index 657668ef826..6be75dc95e8 100644
         .end __mulsi3
         .size   __mulsi3, . - __mulsi3
 diff --git a/libgcc/config/microblaze/udivsi3.S b/libgcc/config/microblaze/udivsi3.S
-index fc6a4b5a248..f8ce88bd8b7 100644
+index 496dd6794bf..486bc8f0819 100644
 --- a/libgcc/config/microblaze/udivsi3.S
 +++ b/libgcc/config/microblaze/udivsi3.S
 @@ -59,52 +59,96 @@ __udivsi3:
@@ -360,7 +359,7 @@ index fc6a4b5a248..f8ce88bd8b7 100644
         NOP
  #else
 diff --git a/libgcc/config/microblaze/umodsi3.S b/libgcc/config/microblaze/umodsi3.S
-index 03be6df1fc6..3be3658f7a2 100644
+index a706017c634..1d8e2921745 100644
 --- a/libgcc/config/microblaze/umodsi3.S
 +++ b/libgcc/config/microblaze/umodsi3.S
 @@ -46,7 +46,7 @@
@@ -462,5 +461,5 @@ index 03be6df1fc6..3be3658f7a2 100644
  $LaRETURN_HERE:
  # Restore values of CSRs and that of r3 and the divisor and the dividend
 -- 
-2.37.1 (Apple Git-137.1)
+2.34.1
 
diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-12/0046-Patch-microblaze-MB-64-removal-of-barrel-shift-instr.patch b/meta-microblaze/recipes-devtools/gcc/gcc-13/0046-MB-64-removal-of-barrel-shift-instructions-from-defa.patch
index 29a7b4eb..5f45d03f 100644
--- a/meta-microblaze/recipes-devtools/gcc/gcc-12/0046-Patch-microblaze-MB-64-removal-of-barrel-shift-instr.patch
+++ b/meta-microblaze/recipes-devtools/gcc/gcc-13/0046-MB-64-removal-of-barrel-shift-instructions-from-defa.patch
@@ -1,11 +1,10 @@
-From 39589348962a2e0453ad49118b6bc3dd8a7b1bb5 Mon Sep 17 00:00:00 2001
+From 0776495e85a15c1ad84fd90736059902bb3ea152 Mon Sep 17 00:00:00 2001
 From: Mahesh Bodapati <mbodapat@xilinx.com>
 Date: Tue, 13 Sep 2022 15:59:12 +0530
-Subject: [PATCH 46/53] [Patch, microblaze]: MB-64 removal of barrel-shift
- instructions from default         By default MB-64 is generatting
- barrel-shift instructions. It has been         removed from default.
- Barrel-shift instructions will be generated only if         barrel-shifter is
- enabled. Similarly to double instructions as well.
+Subject: [PATCH 46/54] MB-64 removal of barrel-shift instructions from default
+ By default MB-64 is generatting barrel-shift instructions. It has been
+ removed from default. Barrel-shift instructions will be generated only if
+ barrel-shifter is enabled. Similarly to double instructions as well.
 
         Signed-off-by :Nagaraju Mekala <nmekala@xilix.com>
 ---
@@ -14,10 +13,10 @@ Subject: [PATCH 46/53] [Patch, microblaze]: MB-64 removal of barrel-shift
  2 files changed, 252 insertions(+), 19 deletions(-)
 
 diff --git a/gcc/config/microblaze/microblaze.cc b/gcc/config/microblaze/microblaze.cc
-index 7a08390a027..3ee3996a38d 100644
+index 965a041ea8c..f949a8863d3 100644
 --- a/gcc/config/microblaze/microblaze.cc
 +++ b/gcc/config/microblaze/microblaze.cc
-@@ -3871,7 +3871,7 @@ microblaze_expand_divide (rtx operands[])
+@@ -3880,7 +3880,7 @@ microblaze_expand_divide (rtx operands[])
    emit_insn (gen_rtx_CLOBBER (Pmode, reg18));
  
    if (TARGET_MB_64) {
@@ -27,7 +26,7 @@ index 7a08390a027..3ee3996a38d 100644
      }
    else  {
 diff --git a/gcc/config/microblaze/microblaze.md b/gcc/config/microblaze/microblaze.md
-index 4b9acddb1f1..3695e9e101d 100644
+index f661ba1c241..9bc9512db8e 100644
 --- a/gcc/config/microblaze/microblaze.md
 +++ b/gcc/config/microblaze/microblaze.md
 @@ -547,7 +547,7 @@
@@ -473,5 +472,5 @@ index 4b9acddb1f1..3695e9e101d 100644
    [(set_attr "type"    "arith")
    (set_attr "mode"     "DI")
 -- 
-2.37.1 (Apple Git-137.1)
+2.34.1
 
diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-12/0047-Added-new-MB-64-single-register-arithmetic-instructi.patch b/meta-microblaze/recipes-devtools/gcc/gcc-13/0047-Added-new-MB-64-single-register-arithmetic-instructi.patch
index 774fad5a..0272fd3c 100644
--- a/meta-microblaze/recipes-devtools/gcc/gcc-12/0047-Added-new-MB-64-single-register-arithmetic-instructi.patch
+++ b/meta-microblaze/recipes-devtools/gcc/gcc-13/0047-Added-new-MB-64-single-register-arithmetic-instructi.patch
@@ -1,14 +1,14 @@
-From e32334b0f8a4c9532975001ffab33e86469ea4e1 Mon Sep 17 00:00:00 2001
+From 003f60fa4eedddd15de6e9f633bffec1a887fe45 Mon Sep 17 00:00:00 2001
 From: Nagaraju <nmekala@xilinx.com>
 Date: Fri, 23 Aug 2019 16:16:53 +0530
-Subject: [PATCH 47/53] Added new MB-64 single register arithmetic instructions
+Subject: [PATCH 47/54] Added new MB-64 single register arithmetic instructions
 
 ---
  gcc/config/microblaze/microblaze.md | 56 +++++++++++++++++++++++++++++
  1 file changed, 56 insertions(+)
 
 diff --git a/gcc/config/microblaze/microblaze.md b/gcc/config/microblaze/microblaze.md
-index 3695e9e101d..85c1ab45994 100644
+index 9bc9512db8e..9172f1bc209 100644
 --- a/gcc/config/microblaze/microblaze.md
 +++ b/gcc/config/microblaze/microblaze.md
 @@ -654,6 +654,18 @@
@@ -103,5 +103,5 @@ index 3695e9e101d..85c1ab45994 100644
    [(set (match_operand:DI 0 "register_operand" "=d,d")
         (xor:DI (match_operand:DI 1 "arith_operand" "%d,d")
 -- 
-2.37.1 (Apple Git-137.1)
+2.34.1
 
diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-12/0048-Patch-MicroBlaze-Added-support-for-64-bit-Immediate-.patch b/meta-microblaze/recipes-devtools/gcc/gcc-13/0048-Added-support-for-64-bit-Immediate-values.patch
index a442bf0f..0be495a8 100644
--- a/meta-microblaze/recipes-devtools/gcc/gcc-12/0048-Patch-MicroBlaze-Added-support-for-64-bit-Immediate-.patch
+++ b/meta-microblaze/recipes-devtools/gcc/gcc-13/0048-Added-support-for-64-bit-Immediate-values.patch
@@ -1,8 +1,7 @@
-From f5f262b196de197b7e9ece8cc08c8715f953857f Mon Sep 17 00:00:00 2001
+From 8d20c82d95e22a42551b446c087d9e06958a3580 Mon Sep 17 00:00:00 2001
 From: Mahesh Bodapati <mbodapat@xilinx.com>
 Date: Mon, 26 Aug 2019 15:55:22 +0530
-Subject: [PATCH 48/53] [Patch,MicroBlaze] : Added support for 64 bit Immediate
- values.
+Subject: [PATCH 48/54] Added support for 64 bit Immediate values.
 
 ---
  gcc/config/microblaze/constraints.md | 4 ++--
@@ -10,7 +9,7 @@ Subject: [PATCH 48/53] [Patch,MicroBlaze] : Added support for 64 bit Immediate
  2 files changed, 3 insertions(+), 4 deletions(-)
 
 diff --git a/gcc/config/microblaze/constraints.md b/gcc/config/microblaze/constraints.md
-index 3f9805dfe0a..91653f36f52 100644
+index fa605831bfe..40cd88a870c 100644
 --- a/gcc/config/microblaze/constraints.md
 +++ b/gcc/config/microblaze/constraints.md
 @@ -53,9 +53,9 @@
@@ -26,7 +25,7 @@ index 3f9805dfe0a..91653f36f52 100644
  
  ;; Define floating point constraints
 diff --git a/gcc/config/microblaze/microblaze.md b/gcc/config/microblaze/microblaze.md
-index 85c1ab45994..0ac6e1480e6 100644
+index 9172f1bc209..f41474feca6 100644
 --- a/gcc/config/microblaze/microblaze.md
 +++ b/gcc/config/microblaze/microblaze.md
 @@ -1332,8 +1332,7 @@
@@ -40,5 +39,5 @@ index 85c1ab45994..0ac6e1480e6 100644
     addlk\t%0,r0,r0\t
     addlik\t%0,r0,%1\t #N1 %X1
 -- 
-2.37.1 (Apple Git-137.1)
+2.34.1
 
diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-12/0049-Patch-microblaze-Fix-Compiler-crash-with-freg-struct.patch b/meta-microblaze/recipes-devtools/gcc/gcc-13/0049-Fix-Compiler-crash-with-freg-struct-return-This-patc.patch
index 5732000d..ca813796 100644
--- a/meta-microblaze/recipes-devtools/gcc/gcc-12/0049-Patch-microblaze-Fix-Compiler-crash-with-freg-struct.patch
+++ b/meta-microblaze/recipes-devtools/gcc/gcc-13/0049-Fix-Compiler-crash-with-freg-struct-return-This-patc.patch
@@ -1,10 +1,10 @@
-From d45405d05a1f9079f7db86ba60dcd30d358613d4 Mon Sep 17 00:00:00 2001
+From 8107e0be46e5bdbfc353648ce5129afde5275ea9 Mon Sep 17 00:00:00 2001
 From: Mahesh Bodapati <mbodapat@xilinx.com>
 Date: Tue, 13 Sep 2022 16:06:10 +0530
-Subject: [PATCH 49/53] [Patch, microblaze]: Fix Compiler crash with
- -freg-struct-return     This patch fixes a bug in MB GCC regarding the
- passing struct     values in registers. Currently we are only handling SImode
-     With this patch all other modes are handled properly
+Subject: [PATCH 49/54] Fix Compiler crash with -freg-struct-return This patch
+ fixes a bug in MB GCC regarding the passing struct values in registers.
+ Currently we are only handling SImode With this patch all other modes are
+ handled properly
 
     Signed-off-by :Nagaraju Mekala <nmekala@xilix.com>
 ---
@@ -13,10 +13,10 @@ Subject: [PATCH 49/53] [Patch, microblaze]: Fix Compiler crash with
  2 files changed, 10 insertions(+), 20 deletions(-)
 
 diff --git a/gcc/config/microblaze/microblaze.cc b/gcc/config/microblaze/microblaze.cc
-index 3ee3996a38d..4668a81d060 100644
+index f949a8863d3..4748c8c1f0d 100644
 --- a/gcc/config/microblaze/microblaze.cc
 +++ b/gcc/config/microblaze/microblaze.cc
-@@ -3909,7 +3909,16 @@ microblaze_function_value (const_tree valtype,
+@@ -3918,7 +3918,16 @@ microblaze_function_value (const_tree valtype,
                            const_tree func ATTRIBUTE_UNUSED,
                            bool outgoing ATTRIBUTE_UNUSED)
  {
@@ -35,7 +35,7 @@ index 3ee3996a38d..4668a81d060 100644
  
  /* Implement TARGET_SCHED_ADJUST_COST.  */
 diff --git a/gcc/config/microblaze/microblaze.h b/gcc/config/microblaze/microblaze.h
-index c48b6de0d58..730ad87b13b 100644
+index 4d6babfe9c4..eea360fda47 100644
 --- a/gcc/config/microblaze/microblaze.h
 +++ b/gcc/config/microblaze/microblaze.h
 @@ -266,13 +266,6 @@ extern enum pipeline_type microblaze_pipe;
@@ -72,5 +72,5 @@ index c48b6de0d58..730ad87b13b 100644
     On the MicroBlaze, R2 R3 are the only register thus used.
     Currently, R2 are only implemented  here (C has no complex type)  */
 -- 
-2.37.1 (Apple Git-137.1)
+2.34.1
 
diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-12/0050-Patch-microblaze-Add-TARGET_OPTION_OPTIMIZATION-and-.patch b/meta-microblaze/recipes-devtools/gcc/gcc-13/0050-Add-TARGET_OPTION_OPTIMIZATION-and-disable-fivopts-b.patch
index ed48daf7..3b8fad81 100644
--- a/meta-microblaze/recipes-devtools/gcc/gcc-12/0050-Patch-microblaze-Add-TARGET_OPTION_OPTIMIZATION-and-.patch
+++ b/meta-microblaze/recipes-devtools/gcc/gcc-13/0050-Add-TARGET_OPTION_OPTIMIZATION-and-disable-fivopts-b.patch
@@ -1,8 +1,8 @@
-From a64afc59e82703f40d04d4d7126038811a195467 Mon Sep 17 00:00:00 2001
+From b7fb925d6277d11e4014aa1731fc58813e30761f Mon Sep 17 00:00:00 2001
 From: Nagaraju <nmekala@xilinx.com>
 Date: Wed, 8 May 2019 14:12:03 +0530
-Subject: [PATCH 50/53] [Patch, microblaze]: Add TARGET_OPTION_OPTIMIZATION and
- disable fivopts by default
+Subject: [PATCH 50/54] Add TARGET_OPTION_OPTIMIZATION and disable fivopts by
+ default
 
 Added TARGET_OPTION_OPTIMIZATIONS and Turn off ivopts by default.
 
@@ -21,7 +21,7 @@ Conflicts:
  1 file changed, 13 insertions(+)
 
 diff --git a/gcc/common/config/microblaze/microblaze-common.cc b/gcc/common/config/microblaze/microblaze-common.cc
-index 21b35f55b92..137332ded25 100644
+index 8750b022447..8a924e8a997 100644
 --- a/gcc/common/config/microblaze/microblaze-common.cc
 +++ b/gcc/common/config/microblaze/microblaze-common.cc
 @@ -24,7 +24,20 @@
@@ -46,5 +46,5 @@ index 21b35f55b92..137332ded25 100644
 +
  struct gcc_targetm_common targetm_common = TARGETM_COMMON_INITIALIZER;
 -- 
-2.37.1 (Apple Git-137.1)
+2.34.1
 
diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-12/0051-Patch-microblaze-Reducing-Stack-space-for-arguments.patch b/meta-microblaze/recipes-devtools/gcc/gcc-13/0051-Reducing-Stack-space-for-arguments.patch
index b9575eac..648da43a 100644
--- a/meta-microblaze/recipes-devtools/gcc/gcc-12/0051-Patch-microblaze-Reducing-Stack-space-for-arguments.patch
+++ b/meta-microblaze/recipes-devtools/gcc/gcc-13/0051-Reducing-Stack-space-for-arguments.patch
@@ -1,7 +1,7 @@
-From 09e10c513f8970f4d2402244b7ac69ecd33b4c04 Mon Sep 17 00:00:00 2001
+From a464c0e6070cac9b40b7fe760e25cbd484a615a7 Mon Sep 17 00:00:00 2001
 From: Mahesh Bodapati <mbodapat@xilinx.com>
 Date: Tue, 13 Sep 2022 16:35:00 +0530
-Subject: [PATCH 51/53] [Patch, microblaze]: Reducing Stack space for arguments
+Subject: [PATCH 51/54] Reducing Stack space for arguments
 
     Currently in Microblaze target stack space for arguments in register is being
     allocated even if there are no arguments in the function.
@@ -16,7 +16,7 @@ Subject: [PATCH 51/53] [Patch, microblaze]: Reducing Stack space for arguments
  3 files changed, 133 insertions(+), 2 deletions(-)
 
 diff --git a/gcc/config/microblaze/microblaze-protos.h b/gcc/config/microblaze/microblaze-protos.h
-index 7f575c2adec..bd594699940 100644
+index 0e9f783c4a4..091d8d9a51b 100644
 --- a/gcc/config/microblaze/microblaze-protos.h
 +++ b/gcc/config/microblaze/microblaze-protos.h
 @@ -60,6 +60,7 @@ extern int symbol_mentioned_p (rtx);
@@ -28,10 +28,10 @@ index 7f575c2adec..bd594699940 100644
  
  /* Declare functions in microblaze-c.cc.  */
 diff --git a/gcc/config/microblaze/microblaze.cc b/gcc/config/microblaze/microblaze.cc
-index 4668a81d060..24ac215b6d5 100644
+index 4748c8c1f0d..e6d3f35370c 100644
 --- a/gcc/config/microblaze/microblaze.cc
 +++ b/gcc/config/microblaze/microblaze.cc
-@@ -2081,6 +2081,136 @@ microblaze_must_save_register (int regno)
+@@ -2086,6 +2086,136 @@ microblaze_must_save_register (int regno)
    return 0;
  }
  
@@ -169,7 +169,7 @@ index 4668a81d060..24ac215b6d5 100644
     stack pointer.
  
 diff --git a/gcc/config/microblaze/microblaze.h b/gcc/config/microblaze/microblaze.h
-index 730ad87b13b..dfacd080b6d 100644
+index eea360fda47..f23805b1c03 100644
 --- a/gcc/config/microblaze/microblaze.h
 +++ b/gcc/config/microblaze/microblaze.h
 @@ -447,9 +447,9 @@ extern struct microblaze_frame_info current_frame_info;
@@ -185,5 +185,5 @@ index 730ad87b13b..dfacd080b6d 100644
  #define STACK_BOUNDARY                         (TARGET_MB_64 ? 64 : 32)
  
 -- 
-2.37.1 (Apple Git-137.1)
+2.34.1
 
diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-12/0052-Patch-MicroBlaze.patch b/meta-microblaze/recipes-devtools/gcc/gcc-13/0052-If-we-use-break_handler-attribute-then-interrupt-vec.patch
index d504a092..d0474dd9 100644
--- a/meta-microblaze/recipes-devtools/gcc/gcc-12/0052-Patch-MicroBlaze.patch
+++ b/meta-microblaze/recipes-devtools/gcc/gcc-13/0052-If-we-use-break_handler-attribute-then-interrupt-vec.patch
@@ -1,22 +1,21 @@
-From fe2781d189493dc82a3714b48bbc12c6bd5cdfd0 Mon Sep 17 00:00:00 2001
+From b792943436857172e7a39e26a00602c7e6620860 Mon Sep 17 00:00:00 2001
 From: Mahesh Bodapati <mbodapat@xilinx.com>
 Date: Tue, 13 Sep 2022 16:38:43 +0530
-Subject: [PATCH 52/53] [Patch,MicroBlaze] :     If we use break_handler
- attribute then interrupt vector call happened     to break_handler instead of
- interrupt_handler.     this fix will resolve the issue CR-1081780.     This
- fix will not change the behavior of compiler unless there is a usage of
- break_handler attribute.       signed-off-by : Mahesh Bodapati
- <mbodapat@xilinx.com>
+Subject: [PATCH 52/54] If we use break_handler attribute then interrupt vector
+ call happened to break_handler instead of interrupt_handler. this fix will
+ resolve the issue CR-1081780. This fix will not change the behavior of
+ compiler unless there is a usage of break_handler attribute. signed-off-by :
+ Mahesh Bodapati <mbodapat@xilinx.com>
 
 ---
  gcc/config/microblaze/microblaze.cc | 13 +++++--------
  1 file changed, 5 insertions(+), 8 deletions(-)
 
 diff --git a/gcc/config/microblaze/microblaze.cc b/gcc/config/microblaze/microblaze.cc
-index 24ac215b6d5..66d62f6f909 100644
+index e6d3f35370c..58d091fbed2 100644
 --- a/gcc/config/microblaze/microblaze.cc
 +++ b/gcc/config/microblaze/microblaze.cc
-@@ -2020,7 +2020,7 @@ microblaze_save_volatiles (tree func)
+@@ -2025,7 +2025,7 @@ microblaze_save_volatiles (tree func)
  int
  microblaze_is_interrupt_variant (void)
  {
@@ -25,7 +24,7 @@ index 24ac215b6d5..66d62f6f909 100644
  }
  int
  microblaze_is_break_handler (void)
-@@ -2059,7 +2059,7 @@ microblaze_must_save_register (int regno)
+@@ -2064,7 +2064,7 @@ microblaze_must_save_register (int regno)
      {
        if (df_regs_ever_live_p (regno) 
           || regno == MB_ABI_MSR_SAVE_REG
@@ -34,7 +33,7 @@ index 24ac215b6d5..66d62f6f909 100644
                && (regno == MB_ABI_ASM_TEMP_REGNUM
                   || regno == MB_ABI_EXCEPTION_RETURN_ADDR_REGNUM)))
         return 1;
-@@ -2275,9 +2275,6 @@ compute_frame_size (HOST_WIDE_INT size)
+@@ -2280,9 +2280,6 @@ compute_frame_size (HOST_WIDE_INT size)
    fast_interrupt =
      microblaze_fast_interrupt_function_p (current_function_decl);
    save_volatiles = microblaze_save_volatiles (current_function_decl);
@@ -44,7 +43,7 @@ index 24ac215b6d5..66d62f6f909 100644
    gp_reg_size = 0;
    mask = 0;
    var_size = size;
-@@ -3237,7 +3234,7 @@ microblaze_expand_prologue (void)
+@@ -3242,7 +3239,7 @@ microblaze_expand_prologue (void)
                                  gen_rtx_PLUS (Pmode, stack_pointer_rtx,
                                                const0_rtx));
  
@@ -53,7 +52,7 @@ index 24ac215b6d5..66d62f6f909 100644
             /* Do not optimize in flow analysis.  */
             MEM_VOLATILE_P (mem_rtx) = 1;
  
-@@ -3348,12 +3345,12 @@ microblaze_expand_epilogue (void)
+@@ -3353,12 +3350,12 @@ microblaze_expand_epilogue (void)
           a load-use stall cycle  :)   This is also important to handle alloca. 
           (See comments for if (frame_pointer_needed) below.  */
  
@@ -69,5 +68,5 @@ index 24ac215b6d5..66d62f6f909 100644
             MEM_VOLATILE_P (mem_rtx) = 1;
           reg_rtx = gen_rtx_REG (Pmode, MB_ABI_SUB_RETURN_ADDR_REGNUM);
 -- 
-2.37.1 (Apple Git-137.1)
+2.34.1
 
diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-12/0053-patch-microblaze64-Add-Zero_extended-instructions.patch b/meta-microblaze/recipes-devtools/gcc/gcc-13/0053-Add-Zero_extended-instructions.patch
index 6b3f4ddd..52017a9d 100644
--- a/meta-microblaze/recipes-devtools/gcc/gcc-12/0053-patch-microblaze64-Add-Zero_extended-instructions.patch
+++ b/meta-microblaze/recipes-devtools/gcc/gcc-13/0053-Add-Zero_extended-instructions.patch
@@ -1,7 +1,7 @@
-From 6c2e67237a12cecfd8c0575fd17314d3024943fc Mon Sep 17 00:00:00 2001
+From fbf853f0b9571529dcc72fc53adf4a35abd3e050 Mon Sep 17 00:00:00 2001
 From: Mahesh Bodapati <mbodapat@xilinx.com>
 Date: Tue, 13 Sep 2022 16:45:41 +0530
-Subject: [PATCH 53/53] [patch, microblaze64]: Add Zero_extended instructions
+Subject: [PATCH 53/54] Add Zero_extended instructions
 
     Due to latest changes in GCC-10.2 MB64 perforamance has reduced
     We have added zero_extended instructions to get rid of left shift
@@ -16,7 +16,7 @@ Subject: [PATCH 53/53] [patch, microblaze64]: Add Zero_extended instructions
  1 file changed, 27 insertions(+)
 
 diff --git a/gcc/config/microblaze/microblaze.md b/gcc/config/microblaze/microblaze.md
-index 0ac6e1480e6..7a7c70d607b 100644
+index f41474feca6..aff98604db7 100644
 --- a/gcc/config/microblaze/microblaze.md
 +++ b/gcc/config/microblaze/microblaze.md
 @@ -1191,6 +1191,33 @@
@@ -54,5 +54,5 @@ index 0ac6e1480e6..7a7c70d607b 100644
  ;; Sign extension
  ;;----------------------------------------------------------------
 -- 
-2.37.1 (Apple Git-137.1)
+2.34.1
 
diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-13/0054-Fix-failure-with-gcc.c-torture-execute-ashrdi-1.c-Os.patch b/meta-microblaze/recipes-devtools/gcc/gcc-13/0054-Fix-failure-with-gcc.c-torture-execute-ashrdi-1.c-Os.patch
new file mode 100644
index 00000000..ec8bc0cf
--- /dev/null
+++ b/meta-microblaze/recipes-devtools/gcc/gcc-13/0054-Fix-failure-with-gcc.c-torture-execute-ashrdi-1.c-Os.patch
@@ -0,0 +1,42 @@
+From 79d007fea870a3b8d72faa90238cee2cdfaf5c85 Mon Sep 17 00:00:00 2001
+From: Gopi Kumar Bulusu <gopi@sankhya.com>
+Date: Fri, 28 Jun 2024 12:18:38 +0530
+Subject: [PATCH 54/54] Fix failure with gcc.c-torture/execute/ashrdi-1.c -Os
+ execution test
+
+The following tests fail with -Os option because a shift instruction
+in a branch delay slot gets replaced with multiple instructions when
+the processor has no barrel shifter. This fix addresses the problem
+by marking the responsible instruction pattern as type multi preventing
+it from being placed in a delay slot.
+
+>  gcc.c-torture/execute/ashrdi-1.c   -Os  execution test
+>  gcc.c-torture/execute/pr40057.c   -Os  execution test
+>  gcc.c-torture/execute/pr79121.c   -Os  execution test
+>  gcc.c-torture/execute/pr82524.c   -Os  execution test
+>  c-c++-common/torture/vector-compare-1.c   -Os  execution test
+>  gcc.dg/torture/vec-cvt-1.c   -Os  execution test
+
+These tests pass with this fix.
+
+Signed-off-by: Gopi Kumar Bulusu <gopi@sankhya.com>
+---
+ gcc/config/microblaze/microblaze.md | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/gcc/config/microblaze/microblaze.md b/gcc/config/microblaze/microblaze.md
+index aff98604db7..0e3981390c8 100644
+--- a/gcc/config/microblaze/microblaze.md
++++ b/gcc/config/microblaze/microblaze.md
+@@ -2286,7 +2286,7 @@ else
+     output_asm_insn ("bneid\t%3,.-4", operands);
+     return "sra\t%0,%0";
+   }
+-  [(set_attr "type"    "arith")
++  [(set_attr "type"    "multi")
+   (set_attr "mode"    "SI")
+   (set_attr "length"  "20")]
+ )
+-- 
+2.34.1
+
diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-12/microblaze-mulitlib-hack.patch b/meta-microblaze/recipes-devtools/gcc/gcc-13/microblaze-mulitlib-hack.patch
index af8ebf3b..af8ebf3b 100644
--- a/meta-microblaze/recipes-devtools/gcc/gcc-12/microblaze-mulitlib-hack.patch
+++ b/meta-microblaze/recipes-devtools/gcc/gcc-13/microblaze-mulitlib-hack.patch
diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-source_12.%.bbappend b/meta-microblaze/recipes-devtools/gcc/gcc-source_12.%.bbappend
deleted file mode 100644
index 42bcd174..00000000
--- a/meta-microblaze/recipes-devtools/gcc/gcc-source_12.%.bbappend
+++ /dev/null
@@ -1,59 +0,0 @@
-# Add MicroBlaze Patches (only when using MicroBlaze)
-FILESEXTRAPATHS:append := ":${THISDIR}/gcc-12"
-
-SRC_URI += " \
-    file://0001-LOCAL-Testsuite-builtins-tests-require-fpic.patch \
-    file://0002-LOCAL-Quick-fail-g-.dg-opt-memcpy1.C.patch \
-    file://0003-LOCAL-For-dejagnu-static-testing-on-qemu-suppress-wa.patch \
-    file://0004-Patch-testsuite-Add-MicroBlaze-to-target-supports-fo.patch \
-    file://0005-Patch-testsuite-Update-MicroBlaze-strings-test.patch \
-    file://0006-Patch-testsuite-Allow-MicroBlaze-.weakext-pattern-in.patch \
-    file://0007-Patch-testsuite-Add-MicroBlaze-to-check_profiling_av.patch \
-    file://0008-Patch-microblaze-Fix-atomic-side-effects.patch \
-    file://0009-Patch-microblaze-Fix-atomic-boolean-return-value.patch \
-    file://0010-Patch-microblaze-Fix-the-Microblaze-crash-with-msmal.patch \
-    file://0011-Patch-microblaze-Added-ashrsi3_with_size_opt.patch \
-    file://0012-Patch-microblaze-Use-bralid-for-profiler-calls.patch \
-    file://0013-Patch-microblaze-Removed-moddi3-routinue.patch \
-    file://0014-Patch-microblaze-Add-INIT_PRIORITY-support-Added.patch \
-    file://0015-Patch-microblaze-Add-optimized-lshrsi3.patch \
-    file://0016-Patch-microblaze-Add-cbranchsi4_reg.patch \
-    file://0017-Patch-microblaze-Inline-Expansion-of-fsqrt-builtin.patch \
-    file://0018-PATCH-microblaze.md-Improve-adddi3-and-subdi3-insn-d.patch \
-    file://0019-Patch-microblaze-Update-ashlsi3-movsf-patterns.patch \
-    file://0020-Patch-microblaze-8-stage-pipeline-for-microblaze.patch \
-    file://0021-PATCH-21-53-Patch-microblaze-Correct-the-const-high-.patch \
-    file://0022-Fix-microblaze-Fix-internal-compiler-error-with-msma.patch \
-    file://0023-patch-microblaze-Fix-the-calculation-of-high-word-in.patch \
-    file://0024-Patch-MicroBlaze-this-patch-has-1.Fixed-the-bug-in.patch \
-    file://0025-Fixing-the-issue-with-the-builtin_alloc.patch \
-    file://0026-Patch-Microblaze-Removed-fsqrt-generation-for-double.patch \
-    file://0027-Patch-MicroBlaze-Intial-commit-of-64-bit-Microblaze.patch \
-    file://0028-Intial-commit-for-64bit-MB-sources.patch \
-    file://0029-Patch-MicroBlaze-re-arrangement-of-the-compare-branc.patch \
-    file://0030-Patch-Microblaze-previous-commit-broke-the-handling-.patch \
-    file://0031-Patch-Microblaze-Support-of-multilibs-with-m64.patch \
-    file://0032-Patch-MicroBlaze-Fixed-issues-like.patch \
-    file://0033-Patch-MicroBlaze.patch \
-    file://0034-Added-double-arith-instructions.patch \
-    file://0035-Fixed-the-issue-in-the-delay-slot-with-swap-instruct.patch \
-    file://0036-Fixed-the-load-store-issue-with-the-32bit-arith-libr.patch \
-    file://0037-extending-the-Dwarf-support-to-64bit-Microblaze.patch \
-    file://0038-fixing-the-typo-errors-in-umodsi3-file.patch \
-    file://0039-fixing-the-32bit-LTO-related-issue9-1014024.patch \
-    file://0040-Fixed-the-missing-stack-adjustment-in-prologue-of-mo.patch \
-    file://0041-Patch-Microblaze-corrected-SPN-for-dlong-instruction.patch \
-    file://0042-fixing-the-long-long-long-mingw-toolchain-issue.patch \
-    file://0043-Fix-the-MB-64-bug-of-handling-QI-objects.patch \
-    file://0044-Patch-Microblaze-We-will-check-the-possibility-of-pe.patch \
-    file://0045-Patch-MicroBlaze-fixed-typos-in-mul-div-and-mod-asse.patch \
-    file://0046-Patch-microblaze-MB-64-removal-of-barrel-shift-instr.patch \
-    file://0047-Added-new-MB-64-single-register-arithmetic-instructi.patch \
-    file://0048-Patch-MicroBlaze-Added-support-for-64-bit-Immediate-.patch \
-    file://0049-Patch-microblaze-Fix-Compiler-crash-with-freg-struct.patch \
-    file://0050-Patch-microblaze-Add-TARGET_OPTION_OPTIMIZATION-and-.patch \
-    file://0051-Patch-microblaze-Reducing-Stack-space-for-arguments.patch \
-    file://0052-Patch-MicroBlaze.patch \
-    file://0053-patch-microblaze64-Add-Zero_extended-instructions.patch \
-    file://microblaze-mulitlib-hack.patch \
-"
diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-source_13.%.bbappend b/meta-microblaze/recipes-devtools/gcc/gcc-source_13.%.bbappend
new file mode 100644
index 00000000..51b08f36
--- /dev/null
+++ b/meta-microblaze/recipes-devtools/gcc/gcc-source_13.%.bbappend
@@ -0,0 +1,63 @@
+# Add MicroBlaze Patches (only when using MicroBlaze)
+FILESEXTRAPATHS:append := ":${THISDIR}/gcc-13"
+
+# Our changes are all local, no real patch-status
+ERROR_QA:remove = "patch-status"
+
+SRC_URI += " \
+    file://0001-LOCAL-Testsuite-builtins-tests-require-fpic-Signed-o.patch \
+    file://0002-Quick-fail-g-.dg-opt-memcpy1.C-This-particular-testc.patch \
+    file://0003-For-dejagnu-static-testing-on-qemu-suppress-warnings.patch \
+    file://0004-Add-MicroBlaze-to-target-supports-for-atomic-buil.-..patch \
+    file://0005-Update-MicroBlaze-strings-test-for-new-scan-assembly.patch \
+    file://0006-Allow-MicroBlaze-.weakext-pattern-in-regex-match-Ext.patch \
+    file://0007-Add-MicroBlaze-to-check_profiling_available-Testsuit.patch \
+    file://0008-Fix-atomic-side-effects.-In-atomic_compare_and_swaps.patch \
+    file://0009-Fix-atomic-boolean-return-value.-In-atomic_compare_a.patch \
+    file://0010-Fix-the-Microblaze-crash-with-msmall-divides-flag-Co.patch \
+    file://0011-Added-ashrsi3_with_size_opt-Added-ashrsi3_with_size_.patch \
+    file://0012-Use-bralid-for-profiler-calls-Signed-off-by-Edgar-E..patch \
+    file://0013-Removed-moddi3-routinue-Using-the-default-moddi3-fun.patch \
+    file://0014-Add-INIT_PRIORITY-support-Added-TARGET_ASM_CONSTRUCT.patch \
+    file://0015-Add-optimized-lshrsi3-When-barrel-shifter-is-not-pre.patch \
+    file://0016-Add-cbranchsi4_reg-This-patch-optimizes-the-generati.patch \
+    file://0017-Inline-Expansion-of-fsqrt-builtin.-The-changes-are-m.patch \
+    file://0018-microblaze.md-Improve-adddi3-and-subdi3-insn-definit.patch \
+    file://0019-Update-ashlsi3-movsf-patterns-This-patch-removes-the.patch \
+    file://0020-8-stage-pipeline-for-microblaze-This-patch-adds-the-.patch \
+    file://0021-Correct-the-const-high-double-immediate-value-with-t.patch \
+    file://0022-Fix-internal-compiler-error-with-msmall-divides-This.patch \
+    file://0023-Fix-the-calculation-of-high-word-in-a-long-long-64-b.patch \
+    file://0024-this-patch-has-1.Fixed-the-bug-in-version-calculatio.patch \
+    file://0025-Fixing-the-issue-with-the-builtin_alloc.-register-r1.patch \
+    file://0026-Removed-fsqrt-generation-for-double-values.patch \
+    file://0027-Intial-commit-of-64-bit-Microblaze.patch \
+    file://0028-Intial-commit-for-64bit-MB-sources.-Need-to-cleanup-.patch \
+    file://0029-re-arrangement-of-the-compare-branches.patch \
+    file://0030-previous-commit-broke-the-handling-of-SI-Branch-comp.patch \
+    file://0031-Support-of-multilibs-with-m64.patch \
+    file://0032-Fixed-issues-like-1-Interrupt-alignment-issue-2-Sign.patch \
+    file://0033-fixed-below-issues-Floating-point-print-issues-in-64.patch \
+    file://0034-Added-double-arith-instructions-Fixed-prologue-stack.patch \
+    file://0035-Fixed-the-issue-in-the-delay-slot-with-swap-instruct.patch \
+    file://0036-Fixed-the-load-store-issue-with-the-32bit-arith-libr.patch \
+    file://0037-extending-the-Dwarf-support-to-64bit-Microblaze.patch \
+    file://0038-fixing-the-typo-errors-in-umodsi3-file.patch \
+    file://0039-fixing-the-32bit-LTO-related-issue9-1014024.patch \
+    file://0040-Fixed-the-missing-stack-adjustment-in-prologue-of-mo.patch \
+    file://0041-corrected-SPN-for-dlong-instruction-mapping.patch \
+    file://0042-fixing-the-long-long-long-mingw-toolchain-issue.patch \
+    file://0043-Fix-the-MB-64-bug-of-handling-QI-objects.patch \
+    file://0044-We-will-check-the-possibility-of-peephole2-optimizat.patch \
+    file://0045-fixed-typos-in-mul-div-and-mod-assembly-files.patch \
+    file://0046-MB-64-removal-of-barrel-shift-instructions-from-defa.patch \
+    file://0047-Added-new-MB-64-single-register-arithmetic-instructi.patch \
+    file://0048-Added-support-for-64-bit-Immediate-values.patch \
+    file://0049-Fix-Compiler-crash-with-freg-struct-return-This-patc.patch \
+    file://0050-Add-TARGET_OPTION_OPTIMIZATION-and-disable-fivopts-b.patch \
+    file://0051-Reducing-Stack-space-for-arguments.patch \
+    file://0052-If-we-use-break_handler-attribute-then-interrupt-vec.patch \
+    file://0053-Add-Zero_extended-instructions.patch \
+    file://0054-Fix-failure-with-gcc.c-torture-execute-ashrdi-1.c-Os.patch \
+    file://microblaze-mulitlib-hack.patch \
+"
diff --git a/meta-vitis-tc/recipes-devtools/gcc/gcc-12/riscv-multilib-generator-python.patch b/meta-vitis-tc/recipes-devtools/gcc/gcc-12/riscv-multilib-generator-python.patch
deleted file mode 100644
index 9575539e..00000000
--- a/meta-vitis-tc/recipes-devtools/gcc/gcc-12/riscv-multilib-generator-python.patch
+++ /dev/null
@@ -1,14 +0,0 @@
-Use python3 instead of python when calling the mutlib-generator
-
-Upstream-Status: Backport
-
-Signed-off-by: Mark Hatle <mark.hatle@amd.com>
-
---- gcc-12.2.0/gcc/config/riscv/multilib-generator.orig 2024-02-22 19:23:07.166805418 -0700
-+++ gcc-12.2.0/gcc/config/riscv/multilib-generator      2024-02-22 19:18:12.803798625 -0700
-@@ -1,4 +1,4 @@
--#!/usr/bin/env python
-+#!/usr/bin/env python3
- 
- # RISC-V multilib list generator.
- # Copyright (C) 2011-2022 Free Software Foundation, Inc.
diff --git a/meta-vitis-tc/recipes-devtools/gcc/gcc-12/additional-microblaze-multilibs.patch b/meta-vitis-tc/recipes-devtools/gcc/gcc-13/additional-microblaze-multilibs.patch
index e035b8a6..e035b8a6 100644
--- a/meta-vitis-tc/recipes-devtools/gcc/gcc-12/additional-microblaze-multilibs.patch
+++ b/meta-vitis-tc/recipes-devtools/gcc/gcc-13/additional-microblaze-multilibs.patch
diff --git a/meta-vitis-tc/recipes-devtools/gcc/gcc-source_12.%.bbappend b/meta-vitis-tc/recipes-devtools/gcc/gcc-source_12.%.bbappend
deleted file mode 100644
index a439407d..00000000
--- a/meta-vitis-tc/recipes-devtools/gcc/gcc-source_12.%.bbappend
+++ /dev/null
@@ -1,6 +0,0 @@
-# Add MicroBlaze Patches (only when using MicroBlaze)
-FILESEXTRAPATHS:append := ":${THISDIR}/gcc-12"
-SRC_URI += " \
-        file://additional-microblaze-multilibs.patch \
-        file://riscv-multilib-generator-python.patch \
-"
diff --git a/meta-vitis-tc/recipes-devtools/gcc/gcc-source_13.%.bbappend b/meta-vitis-tc/recipes-devtools/gcc/gcc-source_13.%.bbappend
index d7b58f1e..e38dd8b3 100644
--- a/meta-vitis-tc/recipes-devtools/gcc/gcc-source_13.%.bbappend
+++ b/meta-vitis-tc/recipes-devtools/gcc/gcc-source_13.%.bbappend
@@ -1,4 +1,5 @@
 FILESEXTRAPATHS:append := ":${THISDIR}/gcc-13"
 SRC_URI += " \
+        file://additional-microblaze-multilibs.patch \
         file://riscv-multilib-generator-python.patch \
 "