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authorNathan Rossi <nathan.rossi@xilinx.com>2015-04-17 11:18:22 +1000
committerNathan Rossi <nathan.rossi@xilinx.com>2015-04-24 13:36:50 +1000
commiteab360db54841bb39453abb9af1c7181b344498b (patch)
treee58888f8b4e6dd5bdf9bf0accdc88c8efa962fb7
parented8a8cf0057d34788609c864c9936cee32a7a5ca (diff)
downloadmeta-xilinx-eab360db54841bb39453abb9af1c7181b344498b.tar.gz
qemuzynq: Add fixed-clock to device tree for ethernet
* Add a fixed 125 MHz clock to trick the ethernet driver into thinking the reference clock is at the correct frequency * This masks the 'macb e000b000.ps7-ethernet eth0: unable to generate target frequency: 125000000 Hz' message from the macb driver Signed-off-by: Nathan Rossi <nathan.rossi@xilinx.com>
-rw-r--r--conf/machine/boards/qemu/qemuzynq-base.dtsi9
1 files changed, 8 insertions, 1 deletions
diff --git a/conf/machine/boards/qemu/qemuzynq-base.dtsi b/conf/machine/boards/qemu/qemuzynq-base.dtsi
index 3914510d..a2f06657 100644
--- a/conf/machine/boards/qemu/qemuzynq-base.dtsi
+++ b/conf/machine/boards/qemu/qemuzynq-base.dtsi
@@ -9,7 +9,14 @@
9 reg = <0x0 0x40000000>; 9 reg = <0x0 0x40000000>;
10 } ; 10 } ;
11 ps7_axi_interconnect_0: amba@0 { 11 ps7_axi_interconnect_0: amba@0 {
12 /* Setup a fixed 125 MHz clock to trick the ethernet driver */
13 clk125mhz: clock {
14 #clock-cells = <0>;
15 compatible = "fixed-clock";
16 clock-frequency = <125000000>;
17 } ;
12 ps7_ethernet_0: ps7-ethernet@e000b000 { 18 ps7_ethernet_0: ps7-ethernet@e000b000 {
19 clocks = <&clkc 30>, <&clkc 30>, <&clk125mhz>, <&clk125mhz>, <&clkc 30>;
13 phy-handle = <&phy0>; 20 phy-handle = <&phy0>;
14 phy-mode = "gmii"; 21 phy-mode = "gmii";
15 mdio { 22 mdio {
@@ -49,7 +56,7 @@
49 }; 56 };
50 } ; 57 } ;
51 } ; 58 } ;
52 59
53 /* Disabled Devices */ 60 /* Disabled Devices */
54 ps7_gpio_0: ps7-gpio@e000a000 { compatible = "invalid"; }; 61 ps7_gpio_0: ps7-gpio@e000a000 { compatible = "invalid"; };
55 ps7_uart_0: serial@e0000000 { compatible = "invalid"; }; 62 ps7_uart_0: serial@e0000000 { compatible = "invalid"; };