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authorSivaprasad Addepalli <sivaprasad.addepalli@xilinx.com>2024-10-09 11:06:04 +0530
committerSiva Addepalli <sivaprasad.addepalli@xilinx.com>2024-10-09 14:47:07 +0530
commitec6815ed64d808423bcc957cdada9499bfbfc6a7 (patch)
treeb71f36b5520ebda20e22bbafc2f44d07ca99abbc
parent9e5be1fd74527d3d4c65b513b1552c99862bf10a (diff)
downloadmeta-xilinx-ec6815ed64d808423bcc957cdada9499bfbfc6a7.tar.gz
embeddedsw : Updated SRCREV for 2024.2_2563
zdma: Fix the register reset values sdps: Fix IAR compilation warnings xilpm: versal: add crypto support lib:bsp:standalone: Update the descriptions for BSP config options dp21: Update RX Lanecount XDp_RxSetLaneCount() api vphy: Updated CDR Values for DP1.4 rates in DP2.1 condition bsp: standalone: Fix IAR compilation warnings XilAsu: Modified SHA2 example to support asynchronous calls XilAsu: Added asynchronous call support from client sw_apps:asufw:Moved shared memory structures sw_apps: asufw: Remove static IPI configurations XilASU: Updated examples to support call back mipicsiss: Add support for yaml to intact with linux v_hdmiphy1: data: Update generic string to support IP version change dsitxss: data: Updating yaml to support generic compatible string xilpm: versal_common: Fix MISRA-C violation xilpm: versal_common: Fix Misra-C violations sw_services:xilsecure:Fix for existing implementation of AES CM KAT sw_services:xilsecure:Fixed doxygen groupings and comments for versal and versalnet sw_services:xilsecure:Fixed doxygen groupings and comments for core files in server sw_services:xilsecure:Fixed doxygen groupings and comments for client dp21txss: Add support for DP2.1 Passthrough mode dp21rxss: Add debug parameters for DP2.1 training mode dp21: Add DP21 Passthrough support v_hdmitxss: PassThrough: Fix passthrough mode for microblaze platform v_hdmirxss: PassThrough: Fix passthrough mode for microblaze platform sw_services:xilplmi:Updated ASU RAM high address
-rw-r--r--meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass2
1 files changed, 1 insertions, 1 deletions
diff --git a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass
index 285c9654..a62637b8 100644
--- a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass
+++ b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass
@@ -19,7 +19,7 @@ ESW_REV[2022.2] = "5330a64c8efd14f0eef09befdbb8d3d738c33ec2"
19ESW_REV[2023.1] = "af784f742dad0ca6e69e05baf8de51152c396b9a" 19ESW_REV[2023.1] = "af784f742dad0ca6e69e05baf8de51152c396b9a"
20ESW_REV[2023.2] = "e847e1935dca630615e5f7dc694365a44b89699c" 20ESW_REV[2023.2] = "e847e1935dca630615e5f7dc694365a44b89699c"
21ESW_REV[2024.1] = "b173d246826f662b9a98215d8f39e93d39d699b4" 21ESW_REV[2024.1] = "b173d246826f662b9a98215d8f39e93d39d699b4"
22ESW_REV[2024.2] = "f02d2b3ba0b6dbe7022f4dbc599dd7a43d08479c" 22ESW_REV[2024.2] = "4594b107121fb3fe706d5376baad62a3a35bb595"
23SRCREV ??= "${@d.getVarFlag('ESW_REV', d.getVar('ESW_VER')) or 'INVALID'}" 23SRCREV ??= "${@d.getVarFlag('ESW_REV', d.getVar('ESW_VER')) or 'INVALID'}"
24 24
25EMBEDDEDSW_BRANCHARG ?= "${@['nobranch=1', 'branch=${BRANCH}'][d.getVar('BRANCH') != '']}" 25EMBEDDEDSW_BRANCHARG ?= "${@['nobranch=1', 'branch=${BRANCH}'][d.getVar('BRANCH') != '']}"