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| author | Mark Hatle <mark.hatle@amd.com> | 2024-06-04 16:51:04 -0600 |
|---|---|---|
| committer | Mark Hatle <mark.hatle@amd.com> | 2024-11-21 10:43:44 -0600 |
| commit | 60f140e6b95aed0b459c9b35f5197dee5357eed5 (patch) | |
| tree | b21e58133cef5f4f6892674f4826b5661b16e4ce /docs/git@git.enea.com:linux/meta-xilinx.git | |
| parent | b04309510fbe23af1ffa1f084b4b5866a4f177f2 (diff) | |
| download | meta-xilinx-60f140e6b95aed0b459c9b35f5197dee5357eed5.tar.gz | |
various: Remove SOC_VARIANT, split versal and versal-net, add machine_features
SOC_VARIANT has been remove, we are now only using the YP standard SOC_FAMILY
configuration. The defined families are: zynq, zynqmp, versal and versal-net.
Our decision of breaking up versal-net from versal, is based on the SoC CPU
changes from cortexa72/r5 to cortexa78/r52, thus we're treating it as a
different SoC family.
In order to capture the individual capabilities that we used to handle via
SOC_VARIANT, we have defined the following features (some may have been
previously defined):
- mali400 (zynqmp eg and ev)
- vcu (zynqmp ev)
- rfsoc (zynqmp dr RF capabiltiies)
- aie - (versal ai & premium)
- vdu - (versal ai)
SOC_VARIANT_ARCH and SOC_FAMILY_ARCH are now obsolete and replaced by
MACHINE_ARCH. This is based on the guideline that any recipes that use
MACHINE_FEATURES should be MACHINE_ARCH specific.
Signed-off-by: Mark Hatle <mark.hatle@amd.com>
Diffstat (limited to 'docs/git@git.enea.com:linux/meta-xilinx.git')
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