meta-xilinx: Restructuring meta-xilinx to support multiple layers

As discussed previously on mailing list, we are proceeding with layer
restructuring. For rocko release we will have the following layers

meta-xilinx
        ->meta-xilinx-bsp (current meta-xilinx)
        ->meta-xilinx-contrib

In the subsequent releases we will add other layers from Xilinx
meta-xilinx
        ->meta-xilinx-bsp (current meta-xilinx)
        ->meta-petalinux
        ->meta-xilinx-tools
        ->meta-xilinx-contrib

This will provide one clone to get all the required meta layers from
Xilinx for a complete solution, and the users can blacklist any layer
which they don't want to use using bblayer.conf.
This will enables us to help our vendors/partners to add their reference
designs, board definitions etc.

Recipe changes :
 * Move reference design zybo-linux-bd.bb to meta-xilinx-contrib
 * Move kernel patches realted to zybo-linux-bd-zynq7 board to
   meta-xilinx-contrib
 * Update README

Signed-off-by: Manjukumar Matha <manjukumar.harthikote-matha@xilinx.com>

1 files changed, 96 insertions, 0 deletions

diff --git a/meta-xilinx-bsp/recipes-bsp/device-tree/files/microzed-zynq7.dts b/meta-xilinx-bsp/recipes-bsp/device-tree/files/microzed-zynq7.dts
new file mode 100644
index 00000000..b9376a49
--- /dev/null
+++ b/meta-xilinx-bsp/recipes-bsp/device-tree/files/microzed-zynq7.dts
@@ -0,0 +1,96 @@
+/*
+ * Copyright (C) 2011 - 2014 Xilinx
+ * Copyright (C) 2016 Jagan Teki <jteki@openedev.com>
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+/dts-v1/;
+/include/ "zynq-7000.dtsi"
+
+/ {
+        model = "Zynq MicroZED Development Board";
+        compatible = "xlnx,zynq-microzed", "xlnx,zynq-7000";
+
+        aliases {
+                ethernet0 = &gem0;
+                serial0 = &uart1;
+        };
+
+        memory {
+                device_type = "memory";
+                reg = <0x0 0x40000000>;
+        };
+
+        chosen {
+                bootargs = "earlycon";
+                stdout-path = "serial0:115200n8";
+        };
+
+        usb_phy0: phy0 {
+                compatible = "usb-nop-xceiv";
+                #phy-cells = <0>;
+        };
+};
+
+&clkc {
+        ps-clk-frequency = <33333333>;
+};
+
+&gem0 {
+        status = "okay";
+        phy-mode = "rgmii-id";
+        phy-handle = <&ethernet_phy>;
+
+        ethernet_phy: ethernet-phy@0 {
+                reg = <0>;
+        };
+};
+
+&sdhci0 {
+        status = "okay";
+};
+
+&uart1 {
+        status = "okay";
+};
+
+&usb0 {
+        status = "okay";
+        dr_mode = "host";
+        usb-phy = <&usb_phy0>;
+        pinctrl-names = "default";
+        pinctrl-0 = <&pinctrl_usb0_default>;
+};
+
+&pinctrl0 {
+        pinctrl_usb0_default: usb0-default {
+                mux {
+                        groups = "usb0_0_grp";
+                        function = "usb0";
+                };
+
+                conf {
+                        groups = "usb0_0_grp";
+                        slew-rate = <0>;
+                        io-standard = <1>;
+                };
+
+                conf-rx {
+                        pins = "MIO29", "MIO31", "MIO36";
+                        bias-high-impedance;
+                };
+
+                conf-tx {
+                        pins = "MIO28", "MIO30", "MIO32", "MIO33", "MIO34",
+                               "MIO35", "MIO37", "MIO38", "MIO39";
+                        bias-disable;
+                };
+        };
+};