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authorNathan Rossi <nathan@nathanrossi.com>2017-12-13 16:58:34 -0800
committerManjukumar Matha <manjukumar.harthikote-matha@xilinx.com>2018-01-12 15:47:59 -0800
commit7935ef724cd7359ed97e6ae3d90ebc8f07dd7e1f (patch)
tree7c6faff836ccec34825a97fa7b7c49936e2bc4e2 /meta-xilinx-bsp/recipes-microblaze/gcc/gcc-7/0001-Revert.patch
parentfb15f2e401ed07f774ea89e0c91ecd927bf09235 (diff)
downloadmeta-xilinx-rocko.tar.gz
gcc-source: Add all Xilinx MicroBlaze GCC 7.2 patchesrocko
Add all the Xilinx patches for MicroBlaze, this includes a number of bug fixes, testsuite fixes, feature improvements and additional feature support. Important changes: * v10.0 - CPU support * v10.0 - Bit-field instruction support * v10.0 - 8-stage pipeline aka 'frequency' optimized * Size optimized implementations for shift instructions Signed-off-by: Nathan Rossi <nathan@nathanrossi.com> Signed-off-by: Manjukumar Matha <manjukumar.harthikote-matha@xilinx.com>
Diffstat (limited to 'meta-xilinx-bsp/recipes-microblaze/gcc/gcc-7/0001-Revert.patch')
-rw-r--r--meta-xilinx-bsp/recipes-microblaze/gcc/gcc-7/0001-Revert.patch6
1 files changed, 3 insertions, 3 deletions
diff --git a/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-7/0001-Revert.patch b/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-7/0001-Revert.patch
index 8501bd87..93af6514 100644
--- a/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-7/0001-Revert.patch
+++ b/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-7/0001-Revert.patch
@@ -1,7 +1,7 @@
1From cd395cbdaa551924459d6ecf143cb8e4a5771f2f Mon Sep 17 00:00:00 2001 1From 12cd383fbef719cc1a84cc80ff171073409a8557 Mon Sep 17 00:00:00 2001
2From: eager <eager@138bc75d-0d04-0410-961f-82ee72b054a4> 2From: eager <eager@138bc75d-0d04-0410-961f-82ee72b054a4>
3Date: Sat, 27 May 2017 18:29:40 +0000 3Date: Sat, 27 May 2017 18:29:40 +0000
4Subject: [PATCH 1/4] Revert: 2016-01-21 Ajit Agarwal 4Subject: [PATCH] Revert: 2016-01-21 Ajit Agarwal
5 <ajitkum@xilinx.com> 5 <ajitkum@xilinx.com>
6 6
7 See https://gcc.gnu.org/ml/gcc/2017-05/msg00221.html. 7 See https://gcc.gnu.org/ml/gcc/2017-05/msg00221.html.
@@ -38,5 +38,5 @@ index 66e4ef5c3d..2c9ece1d6c 100644
38 } 38 }
39 #define GP_REG_FIRST 0 39 #define GP_REG_FIRST 0
40-- 40--
412.11.0 412.14.2
42 42