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authorMark Hatle <mark.hatle@xilinx.com>2021-12-15 13:52:16 -0800
committerMark Hatle <mark.hatle@xilinx.com>2021-12-22 08:19:01 -0800
commit322e23dc213d51a12345ca705b3776f189dc413f (patch)
treee257ca97fa6d3eef83c845b67d711b2d8ecba5ba /meta-xilinx-core/classes
parentdd95dde009dc7968f6e6e4c0609e7b443c55c627 (diff)
downloadmeta-xilinx-322e23dc213d51a12345ca705b3776f189dc413f.tar.gz
Initial restructure/split of meta-xilinx-bsp
Create a new meta-xilinx-core, move core functionality to the core, keeping board specific files in the bsp layer. zynqmp-generic changed from require <board> to include, so if meta-xilinx-bsp is not available it will not fail. Signed-off-by: Mark Hatle <mark.hatle@xilinx.com>
Diffstat (limited to 'meta-xilinx-core/classes')
-rw-r--r--meta-xilinx-core/classes/fpgamanager_custom.bbclass85
-rw-r--r--meta-xilinx-core/classes/image-types-xilinx-qemu.bbclass10
-rw-r--r--meta-xilinx-core/classes/image-wic-utils.bbclass51
-rw-r--r--meta-xilinx-core/classes/kernel-simpleimage.bbclass35
-rw-r--r--meta-xilinx-core/classes/qemuboot-xilinx.bbclass27
-rw-r--r--meta-xilinx-core/classes/xilinx-fetch-restricted.bbclass35
-rw-r--r--meta-xilinx-core/classes/xilinx-platform-init.bbclass14
-rw-r--r--meta-xilinx-core/classes/xilinx-testimage.bbclass11
-rw-r--r--meta-xilinx-core/classes/xlnx-standalone.bbclass16
9 files changed, 284 insertions, 0 deletions
diff --git a/meta-xilinx-core/classes/fpgamanager_custom.bbclass b/meta-xilinx-core/classes/fpgamanager_custom.bbclass
new file mode 100644
index 00000000..0b5fa249
--- /dev/null
+++ b/meta-xilinx-core/classes/fpgamanager_custom.bbclass
@@ -0,0 +1,85 @@
1LICENSE = "MIT"
2LIC_FILES_CHKSUM = "file://${COMMON_LICENSE_DIR}/MIT;md5=0835ade698e0bcf8506ecda2f7b4f302"
3
4inherit devicetree
5
6DEPENDS = "dtc-native bootgen-native"
7
8COMPATIBLE_MACHINE ?= "^$"
9COMPATIBLE_MACHINE:zynqmp = ".*"
10COMPATIBLE_MACHINE:zynq = ".*"
11
12PROVIDES = ""
13
14do_fetch[cleandirs] = "${B}"
15
16DT_PADDING_SIZE = "0x1000"
17BOOTGEN_FLAGS ?= " -arch ${SOC_FAMILY} ${@bb.utils.contains('SOC_FAMILY','zynqmp','-w','-process_bitstream bin',d)}"
18
19S ?= "${WORKDIR}"
20FW_DIR ?= ""
21DTSI_PATH ?= ""
22DT_FILES_PATH = "${S}/${DTSI_PATH}"
23
24python (){
25
26 if "git://" in d.getVar("SRC_URI") or "https://" in d.getVar("SRC_URI"):
27 d.setVar("S",'${WORKDIR}/git/'+d.getVar("FW_DIR"))
28 else:
29 if d.getVar("SRC_URI").count(".dtsi") != 1 or d.getVar("SRC_URI").count(".bit") != 1 \
30 or d.getVar("SRC_URI").count("shell.json") != 1:
31 raise bb.parse.SkipRecipe("Need one '.dtsi', one '.bit' and one 'shell.json' file added to SRC_URI")
32
33 d.setVar("DTSI_PATH",os.path.dirname([a for a in d.getVar('SRC_URI').split('file://') if '.dtsi' in a][0]))
34 d.setVar("BIT_PATH",os.path.dirname([a for a in d.getVar('SRC_URI').split('file://') if '.bit' in a][0]))
35 d.setVar("JSON_PATH",os.path.dirname([a for a in d.getVar('SRC_URI').split('file://') if 'shell.json' in a][0]))
36
37 #optional input
38 if '.xclbin' in d.getVar("SRC_URI"):
39 d.setVar("XCL_PATH",os.path.dirname([a for a in d.getVar('SRC_URI').split('file://') if '.xclbin' in a][0]))
40}
41python do_configure() {
42 import glob, re, shutil
43
44 if bb.utils.contains('MACHINE_FEATURES', 'fpga-overlay', False, True, d):
45 bb.warn("Using fpga-manager.bbclass requires fpga-overlay MACHINE_FEATURE to be enabled")
46
47 #renaming firmware-name using $PN as bitstream will be renamed using $PN when generating the bin file
48 orig_dtsi = glob.glob(d.getVar('S')+ (d.getVar('DTSI_PATH') or '') + '/*.dtsi')[0]
49 new_dtsi = d.getVar('S') + '/pl.dtsi_firmwarename'
50 with open(new_dtsi, 'w') as newdtsi:
51 with open(orig_dtsi) as olddtsi:
52 for line in olddtsi:
53 newdtsi.write(re.sub('firmware-name.*\".*\"','firmware-name = \"'+d.getVar('PN')+'.bit.bin\"',line))
54 shutil.move(new_dtsi,orig_dtsi)
55}
56
57python devicetree_do_compile:append() {
58 import glob, subprocess
59 pn = d.getVar('PN')
60 biffile = pn + '.bif'
61
62 with open(biffile, 'w') as f:
63 f.write('all:\n{\n\t' + glob.glob(d.getVar('S')+(d.getVar('BIT_PATH') or '') + '/*.bit')[0] + '\n}')
64
65 bootgenargs = ["bootgen"] + (d.getVar("BOOTGEN_FLAGS") or "").split()
66 bootgenargs += ["-image", biffile, "-o", pn + ".bit.bin"]
67 subprocess.run(bootgenargs, check = True)
68
69 if not os.path.isfile(pn + ".bit.bin"):
70 bb.fatal("bootgen failed. Enable -log debug with bootgen and check logs")
71}
72
73do_install() {
74 install -d ${D}/${nonarch_base_libdir}/firmware/xilinx/${PN}/
75 install -Dm 0644 *.dtbo ${D}/${nonarch_base_libdir}/firmware/xilinx/${PN}/${PN}.dtbo
76 install -Dm 0644 ${PN}.bit.bin ${D}/${nonarch_base_libdir}/firmware/xilinx/${PN}/${PN}.bit.bin
77 if ls ${S}/${XCL_PATH}/*.xclbin >/dev/null 2>&1; then
78 install -Dm 0644 ${S}/${XCL_PATH}/*.xclbin ${D}/${nonarch_base_libdir}/firmware/xilinx/${PN}/${PN}.xclbin
79 fi
80 install -Dm 0644 ${S}/${JSON_PATH}/shell.json ${D}/${nonarch_base_libdir}/firmware/xilinx/${PN}/shell.json
81}
82
83do_deploy[noexec] = "1"
84
85FILES:${PN} += "${nonarch_base_libdir}/firmware/xilinx/${PN}"
diff --git a/meta-xilinx-core/classes/image-types-xilinx-qemu.bbclass b/meta-xilinx-core/classes/image-types-xilinx-qemu.bbclass
new file mode 100644
index 00000000..63318087
--- /dev/null
+++ b/meta-xilinx-core/classes/image-types-xilinx-qemu.bbclass
@@ -0,0 +1,10 @@
1# Define the 'qemu-sd' conversion type
2#
3# This conversion type pads any image to the 512K boundary to ensure that the
4# image file can be used directly with QEMU's SD emulation which requires the
5# block device to match that of valid SD card sizes (which are multiples of
6# 512K).
7
8CONVERSIONTYPES:append = " qemu-sd"
9CONVERSION_CMD:qemu-sd = "cp ${IMAGE_NAME}${IMAGE_NAME_SUFFIX}.${type} ${IMAGE_NAME}${IMAGE_NAME_SUFFIX}.${type}.qemu-sd; truncate -s %256M ${IMAGE_NAME}${IMAGE_NAME_SUFFIX}.${type}.qemu-sd"
10CONVERSION_DEPENDS_qemu-sd = "coreutils-native"
diff --git a/meta-xilinx-core/classes/image-wic-utils.bbclass b/meta-xilinx-core/classes/image-wic-utils.bbclass
new file mode 100644
index 00000000..562f3263
--- /dev/null
+++ b/meta-xilinx-core/classes/image-wic-utils.bbclass
@@ -0,0 +1,51 @@
1# Helper/utility functions to work with the IMAGE_BOOT_FILES variable and its
2# expected behvaior with regards to the contents of the DEPLOY_DIR_IMAGE.
3#
4# The use of these functions assume that the deploy directory is populated with
5# any dependent files/etc. Such that the recipe using these functions depends
6# on the recipe that provides the files being used/queried.
7
8def boot_files_split_expand(d):
9 # IMAGE_BOOT_FILES has extra renaming info in the format '<source>;<target>'
10 for f in (d.getVar("IMAGE_BOOT_FILES") or "").split(" "):
11 parts = f.split(";", 1)
12 sources = [parts[0].strip()]
13 if "*" in parts[0]:
14 # has glob part
15 import glob
16 deployroot = d.getVar("DEPLOY_DIR_IMAGE")
17 sources = []
18 for i in glob.glob(os.path.join(deployroot, parts[0])):
19 sources.append(os.path.basename(i))
20
21 # for all sources, yield an entry
22 for s in sources:
23 if len(parts) == 2:
24 yield s, parts[1].strip()
25 yield s, s
26
27def boot_files_bitstream(d):
28 expectedfiles = [("bitstream", True)]
29 expectedexts = [(".bit", True), (".bin", False)]
30 # search for bitstream paths, use the renamed file. First matching is used
31 for source, target in boot_files_split_expand(d):
32 # skip boot.bin and u-boot.bin, it is not a bitstream
33 skip = ["boot.bin", "u-boot.bin"]
34 if source in skip or target in skip:
35 continue
36
37 for e, t in expectedfiles:
38 if source == e or target == e:
39 return target, t
40 for e, t in expectedexts:
41 if source.endswith(e) or target.endswith(e):
42 return target, t
43 return "", False
44
45def boot_files_dtb_filepath(d):
46 dtbs = (d.getVar("IMAGE_BOOT_FILES") or "").split(" ")
47 for source, target in boot_files_split_expand(d):
48 if target.endswith(".dtb"):
49 return target
50 return ""
51
diff --git a/meta-xilinx-core/classes/kernel-simpleimage.bbclass b/meta-xilinx-core/classes/kernel-simpleimage.bbclass
new file mode 100644
index 00000000..110ee254
--- /dev/null
+++ b/meta-xilinx-core/classes/kernel-simpleimage.bbclass
@@ -0,0 +1,35 @@
1python __anonymous () {
2 kerneltypes = set((d.getVar("KERNEL_IMAGETYPE") or "").split())
3 kerneltypes |= set((d.getVar("KERNEL_IMAGETYPES") or "").split())
4 if any(t.startswith("simpleImage.") for t in kerneltypes):
5 # Enable building of simpleImage
6 bb.build.addtask('do_prep_simpleimage', 'do_compile', 'do_configure', d)
7 uarch = d.getVar("UBOOT_ARCH")
8 if uarch == "microblaze":
9 d.appendVarFlag('do_prep_simpleimage', 'depends', ' virtual/dtb:do_populate_sysroot')
10}
11
12do_prep_simpleimage[dirs] += "${B}"
13do_prep_simpleimage () {
14 install -d ${B}/arch/${ARCH}/boot/dts
15 for type in ${KERNEL_IMAGETYPES} ; do
16 if [ -z "${type##*simpleImage*}" ] && [ ${ARCH} = "microblaze" ]; then
17 ext="${type##*.}"
18 # Microblaze simpleImage only works with dts file
19 cp ${RECIPE_SYSROOT}/boot/devicetree/${ext}.dts ${B}/arch/${ARCH}/boot/dts/
20 fi
21 done
22}
23
24do_deploy:append () {
25 for type in ${KERNEL_IMAGETYPES} ; do
26 if [ -z "${type##*simpleImage*}" ] && [ ${ARCH} = "microblaze" ]; then
27 base_name=${type}-${KERNEL_IMAGE_NAME}
28 install -m 0644 ${KERNEL_OUTPUT_DIR}/${type}.strip $deployDir/${base_name}.strip
29 install -m 0644 ${KERNEL_OUTPUT_DIR}/${type}.unstrip $deployDir/${base_name}.unstrip
30 symlink_name=${type}-${KERNEL_IMAGE_LINK_NAME}
31 ln -sf ${base_name}.strip $deployDir/${symlink_name}.strip
32 ln -sf ${base_name}.unstrip $deployDir/${symlink_name}.unstrip
33 fi
34 done
35}
diff --git a/meta-xilinx-core/classes/qemuboot-xilinx.bbclass b/meta-xilinx-core/classes/qemuboot-xilinx.bbclass
new file mode 100644
index 00000000..48dfa6e2
--- /dev/null
+++ b/meta-xilinx-core/classes/qemuboot-xilinx.bbclass
@@ -0,0 +1,27 @@
1
2# enable the overrides for the context of the conf only
3OVERRIDES .= ":qemuboot-xilinx"
4
5# Default machine targets for Xilinx QEMU (FDT Generic)
6# Allow QB_MACHINE to be overridden by a BSP config
7QB_MACHINE ?= "${QB_MACHINE_XILINX}"
8QB_RNG=""
9QB_MACHINE_XILINX:aarch64 = "-machine arm-generic-fdt"
10QB_MACHINE_XILINX:arm = "-M arm-generic-fdt-7series"
11QB_MACHINE_XILINX:microblaze = "-M microblaze-fdt-plnx"
12
13# defaults
14QB_DEFAULT_KERNEL ?= "none"
15
16inherit qemuboot
17
18# rewrite the qemuboot with the custom sysroot bindir
19python do_write_qemuboot_conf:append() {
20 val = os.path.join(d.getVar('BASE_WORKDIR'), d.getVar('BUILD_SYS'), 'qemu-xilinx-helper-native/1.0-r1/recipe-sysroot-native/usr/bin/')
21 cf.set('config_bsp', 'STAGING_BINDIR_NATIVE', '%s' % val)
22
23 # write out the updated version from this append
24 with open(qemuboot, 'w') as f:
25 cf.write(f)
26}
27
diff --git a/meta-xilinx-core/classes/xilinx-fetch-restricted.bbclass b/meta-xilinx-core/classes/xilinx-fetch-restricted.bbclass
new file mode 100644
index 00000000..a778ec7d
--- /dev/null
+++ b/meta-xilinx-core/classes/xilinx-fetch-restricted.bbclass
@@ -0,0 +1,35 @@
1# This class is setup to override the default fetching for the target recipe.
2# When fetching it forces PREMIRROR only fetching so that no attempts are made
3# to fetch the Xilinx downloads that are restricted to authenticated users only.
4#
5# The purpose of this class is to allow for automatation with pre-downloaded
6# content or content that is available with curated/user defined pre-mirrors
7# and or pre-populated downloads/ directories.
8
9python do_fetch() {
10 xilinx_restricted_url = "xilinx.com/member/forms/download"
11
12 src_uri = (d.getVar('SRC_URI') or "").split()
13 if len(src_uri) == 0:
14 return
15
16 for i in src_uri:
17 if xilinx_restricted_url in i:
18 # force the use of premirrors only, do not attempt download from xilinx.com
19 d.setVar("BB_FETCH_PREMIRRORONLY", "1")
20 break
21
22 try:
23 fetcher = bb.fetch2.Fetch(src_uri, d)
24 fetcher.download()
25 except bb.fetch2.NetworkAccess as e:
26 if xilinx_restricted_url in e.url:
27 # fatal on access to xilinx.com restricted downloads, print the url for manual download
28 bb.fatal("The following download cannot be fetched automatically. " \
29 "Please manually download the file and place it in the 'downloads' directory (or on an available PREMIRROR).\n" \
30 " %s" % (e.url.split(";")[0]))
31 else:
32 bb.fatal(str(e))
33 except bb.fetch2.BBFetchException as e:
34 bb.fatal(str(e))
35}
diff --git a/meta-xilinx-core/classes/xilinx-platform-init.bbclass b/meta-xilinx-core/classes/xilinx-platform-init.bbclass
new file mode 100644
index 00000000..99f7863a
--- /dev/null
+++ b/meta-xilinx-core/classes/xilinx-platform-init.bbclass
@@ -0,0 +1,14 @@
1# This class should be included by any recipe that wants to access or provide
2# the platform init source files which are used to initialize a Zynq or ZynqMP
3# SoC.
4
5# Define the path to the xilinx platform init code/headers
6PLATFORM_INIT_DIR ?= "/usr/src/xilinx-platform-init"
7
8PLATFORM_INIT_STAGE_DIR = "${STAGING_DIR_HOST}${PLATFORM_INIT_DIR}"
9
10# Target files use for platform init
11PLATFORM_INIT_FILES ?= ""
12PLATFORM_INIT_FILES:zynq = "ps7_init_gpl.c ps7_init_gpl.h"
13PLATFORM_INIT_FILES:zynqmp = "psu_init_gpl.c psu_init_gpl.h"
14
diff --git a/meta-xilinx-core/classes/xilinx-testimage.bbclass b/meta-xilinx-core/classes/xilinx-testimage.bbclass
new file mode 100644
index 00000000..99519637
--- /dev/null
+++ b/meta-xilinx-core/classes/xilinx-testimage.bbclass
@@ -0,0 +1,11 @@
1inherit testimage
2
3HOSTTOOLS += 'ip ping ps scp ssh stty'
4
5python do_testimage:prepend () {
6 from oeqa.core.target.qemu import supported_fstypes
7 supported_fstypes.append('wic.qemu-sd')
8}
9
10IMAGE_AUTOLOGIN = "0"
11IMAGE_FSTYPES = "wic.qemu-sd"
diff --git a/meta-xilinx-core/classes/xlnx-standalone.bbclass b/meta-xilinx-core/classes/xlnx-standalone.bbclass
new file mode 100644
index 00000000..9232b1ef
--- /dev/null
+++ b/meta-xilinx-core/classes/xlnx-standalone.bbclass
@@ -0,0 +1,16 @@
1# Only enabled when ilp32 is enabled.
2def xlnx_ilp32_dict(machdata, d):
3 machdata["elf"] = {
4 "aarch64" : (183, 0, 0, True, 32),
5 "aarch64_be" :(183, 0, 0, False, 32),
6 }
7 return machdata
8
9# Only enabled when microblaze64 is enabled.
10def xlnx_mb64_dict(machdata, d):
11 machdata["elf"] = {
12 "microblaze": (189, 0, 0, False, 64),
13 "microblazeeb":(189, 0, 0, False, 64),
14 "microblazeel":(189, 0, 0, True, 64),
15 }
16 return machdata