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author | Sivaprasad Addepalli <sivaprasad.addepalli@xilinx.com> | 2024-10-17 06:25:19 +0530 |
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committer | Siva Addepalli <sivaprasad.addepalli@xilinx.com> | 2024-10-17 08:37:15 +0530 |
commit | 5f2e06eecda95868cc5694a45dad0b99f64e6749 (patch) | |
tree | 9495055e017d9e96d7c4b87dcd3e6776b6a61192 /meta-xilinx-core/dynamic-layers/virtualization-layer | |
parent | 5089816464ca912703066c02f08ea9dcdc9bd32a (diff) | |
download | meta-xilinx-5f2e06eecda95868cc5694a45dad0b99f64e6749.tar.gz |
embeddedsw : Updated SRCREV for 2024.2_9527
xilpm: versal: server: Update CPM5 isolation node definitions with base address
bsp: standalone: Fix plm/psmfw compilation warnings
xilloader: Send device to SLD on invalid AuthJTag when AuthJTagLockDis is set
sw_services: xilloader: Fix Doxygen Warnings
sw_services: xilplmi: Fix Doxygen Warning
xilsem: Add IPI driver dependency in SDT flow.
dfeofdm: Add frequency range MODEL_PARAM
scripts: create_bsp: Check if the app is passed as user input before reading the yaml for app specific flags
nandps: Retrieve the reg property value from smcc node ranges
nandps: Update driver version
sw_services: xilnvm: Skip programming empty glitch detection value
sw_services: xilnvm: Fix read of FIPS version
versal_psmfw: Use shared memory to pass STL events to PLM
sw_services: xilplmi: Added support for handling PSM to PLM IPI events
versal_psmfw: Use shared memory to pass events to PLM
uartpsv: BAUDFDIV_Value needs to be 32 bits
Diffstat (limited to 'meta-xilinx-core/dynamic-layers/virtualization-layer')
0 files changed, 0 insertions, 0 deletions