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| author | Siva Addepalli <sivaprasad.addepalli@xilinx.com> | 2023-09-06 12:45:46 +0530 |
|---|---|---|
| committer | Mark Hatle <mark.hatle@amd.com> | 2023-09-06 11:12:58 -0500 |
| commit | 25213a587b472651ed3481db726fd839a5958c3f (patch) | |
| tree | 32f7c98a796037fe76223e32c3e2c24ee8e42d26 /meta-xilinx-core/recipes-bsp/fpga-manager-script/files/fpgautil.c | |
| parent | 4bb8dacaf413141d83661126e208d5d4b9e04c31 (diff) | |
| download | meta-xilinx-25213a587b472651ed3481db726fd839a5958c3f.tar.gz | |
u-boot-xlnx : Updated SRCREV for 2023.1_7351
arm64: zynqmp: Add output-enable pins to SOMs
Signed-off-by: Siva Addepalli <sivaprasad.addepalli@xilinx.com>
Signed-off-by: Mark Hatle <mark.hatle@amd.com>
Diffstat (limited to 'meta-xilinx-core/recipes-bsp/fpga-manager-script/files/fpgautil.c')
0 files changed, 0 insertions, 0 deletions