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authorSivaprasad Addepalli <sivaprasad.addepalli@xilinx.com>2024-04-22 19:09:29 +0530
committerSiva Addepalli <sivaprasad.addepalli@xilinx.com>2024-04-22 20:07:11 +0530
commitb2d1082413cdb09acc0a8496aea7793fd10f6361 (patch)
tree9abeec8fc793a4077a819dc6cdee1fef9a6fd4ac /meta-xilinx-mali400/dynamic-layers/qt5-layer/recipes-qt/qt5/qtbase/0003-qkmsdevice.cpp-Disable-hw-cursor-as-a-default-option.patch
parent79a63367b1086bed17d770f123b50a2ac6494596 (diff)
downloadmeta-xilinx-b2d1082413cdb09acc0a8496aea7793fd10f6361.tar.gz
linux-xlnx : Updated SRCREV for 2024.1_2095
misc: rsmu: add rsmu cdev driver ptp: 82p33: move register definitions out of ptp folder mfd: rsmu: add FemtoClock3 support mfd: rsmu: support I2C SMBus access ptp: clockmatrix: move register and firmware related definition to idt8a340_reg.h ptp: clockmatrix: Fix caps.max_adj to reflect DPLL_MAX_FREQ_OFFSET[MAX_FFO] ptp: clockmatrix: dco input-to-output delay is 20 FOD cycles + 8ns ptp: clockmatrix: set write phase timer to 0 when not in PCW mode ptp: clockmatrix: support 32-bit address space
Diffstat (limited to 'meta-xilinx-mali400/dynamic-layers/qt5-layer/recipes-qt/qt5/qtbase/0003-qkmsdevice.cpp-Disable-hw-cursor-as-a-default-option.patch')
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