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authorSivaprasad Addepalli <sivaprasad.addepalli@xilinx.com>2024-03-13 22:36:29 +0530
committerSiva Addepalli <sivaprasad.addepalli@xilinx.com>2024-03-13 23:57:09 +0530
commit48d936048f21f5dee8cb1ed268231c0fcfb9b288 (patch)
tree57c616ccddfa762de9c9d51a0502acbef8cc7424 /meta-xilinx-standalone
parent1a5b8bca04f1d0af14d962c64f125d1585f9e88a (diff)
downloadmeta-xilinx-48d936048f21f5dee8cb1ed268231c0fcfb9b288.tar.gz
embeddedsw : Updated SRCREV for 2024.1_7115
lib: sw_apps: open-amp: Wrap SHARED_MEM_PA symbol in ifndef rfdc: Remove redundant clock from examples video_common: Add DynamicRange structure parameter video_common: Add DynamicRange structure parameter dp21: Add MSA macro definations to get/set the MSA attributes of a video format dp21txss: Add XDPTxss_SetMsa() dp21rxss: Add XDPRxss_GetMsa() dp21rxss: Add yaml changes to support import examples dp21txss: Add yaml changes to support import examples dp21txss: examples: Add support for system device-tree flow dp21rxss: examples: Update rx_only example to support sdt flow lib: sw_services: xiltimer: Update the processor checks for VersalNet platform drivers: Add device_type field in the driver yamls ThirdParty: Update the dependent section order PS peripherals first lib: sw_apps: Add required_mem section scripts: pyesw: Add support for hardware error validation lib: sw_services: xilsecure: Use cmake_warning macro ThirdParty: sw_services: lwip220: src: lwip220.cmake: Use cmake_error macro cmake: Findcommon: Add custom macros for error and warning message lib: sw_services: Update cmake and yaml files for VersalNet sw_services: xilloader: Add code to handle sub-partition for APU Subsystem v_sdirxss: fix kcu116 application baseaddress axis_switch: Add find_package common bsp: arm: Update the ARM PMU counters reset logic Xilsem:Add Client interface to read Total frames of a Row in SSIT devices scugic: Add support for compiling examples in Yocto flow qspipsu: Revise the export feedback clock property logic in tcl Xilsem:Add Server interface to send Total frames of a row in SSIT device
Diffstat (limited to 'meta-xilinx-standalone')
-rw-r--r--meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass2
1 files changed, 1 insertions, 1 deletions
diff --git a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass
index cf4a6432..1e9e3729 100644
--- a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass
+++ b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass
@@ -12,7 +12,7 @@ BRANCH ??= "${@d.getVarFlag('ESW_BRANCH', d.getVar('ESW_VER')) or '${ESW_VER}'}"
12ESW_REV[git] = "${AUTOREV}" 12ESW_REV[git] = "${AUTOREV}"
13ESW_REV[2023.1] = "af784f742dad0ca6e69e05baf8de51152c396b9a" 13ESW_REV[2023.1] = "af784f742dad0ca6e69e05baf8de51152c396b9a"
14ESW_REV[2023.2] = "73f0904e41cc109f18bb19a5329d0e5a66af2434" 14ESW_REV[2023.2] = "73f0904e41cc109f18bb19a5329d0e5a66af2434"
15ESW_REV[2024.1] = "69d24c5a0f40a403004ced79a7c3c2cedd424049" 15ESW_REV[2024.1] = "ad038fbbeccd66f126ad80980452b8fecee60e4f"
16SRCREV ??= "${@d.getVarFlag('ESW_REV', d.getVar('ESW_VER')) or '${AUTOREV}'}" 16SRCREV ??= "${@d.getVarFlag('ESW_REV', d.getVar('ESW_VER')) or '${AUTOREV}'}"
17 17
18EMBEDDEDSW_BRANCHARG ?= "${@['nobranch=1', 'branch=${BRANCH}'][d.getVar('BRANCH') != '']}" 18EMBEDDEDSW_BRANCHARG ?= "${@['nobranch=1', 'branch=${BRANCH}'][d.getVar('BRANCH') != '']}"