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| author | Sivaprasad Addepalli <sivaprasad.addepalli@xilinx.com> | 2024-04-10 06:14:40 +0530 |
|---|---|---|
| committer | Siva Addepalli <sivaprasad.addepalli@xilinx.com> | 2024-04-10 07:47:10 +0530 |
| commit | e93a9e6f7e731953c5c576d86010f4ec1b89ae07 (patch) | |
| tree | 1768bd5bef4876094bfe8c9f9ea26ae73c44ebf1 /meta-xilinx-standalone | |
| parent | 54a1ee1b26975e53ef406ec57daf6187abc5f496 (diff) | |
| download | meta-xilinx-e93a9e6f7e731953c5c576d86010f4ec1b89ae07.tar.gz | |
embeddedsw : Updated SRCREV for 2024.1_8591
Updated sysmonpsv to 4.2
Revert "sysmonpsv: Added SSIT Support"
BSP: riscv: Fix FPU context handling in trap handler
vphy: Added support for DP2.1
sw_services:xilocp:Fix review comments for XOcp_DmeXppuConfig
sw_services:xilloader:Fixed doxygen comments format
TPG: Addition of bool library in header file
bsp: cortexr52: Use PMU as default timer for Cortex-R52
sw_services: xilplmi: Fix MISRA-C violation 8.6
sw_services: xilplmi: Fix MISRA-C violation 2.2
sw_services: xilplmi: Fix MISRA-C violation 17.8
sw_services: xilplmi: Fix MISRA-C violation 10.3
mipicsiss: example: update GPIO address.
sw_apps: zynqmp_pmufw: Correct typo for SOM specific macro
dp21: Fix linking issues in C++
dp14: Fix linking issues in C++
dp12: Fix linking issues in C++
rfdc: NCO Frequency
xilplmi: added CDO debug prints
intc: Fix xintc_low_level_example for HW designs with fast interrupts
Diffstat (limited to 'meta-xilinx-standalone')
| -rw-r--r-- | meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass index 17e26446..74de7ea6 100644 --- a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass +++ b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass | |||
| @@ -13,7 +13,7 @@ BRANCH ??= "${@d.getVarFlag('ESW_BRANCH', d.getVar('ESW_VER')) or '${ESW_VER}'}" | |||
| 13 | ESW_REV[git] = "${AUTOREV}" | 13 | ESW_REV[git] = "${AUTOREV}" |
| 14 | ESW_REV[2023.1] = "af784f742dad0ca6e69e05baf8de51152c396b9a" | 14 | ESW_REV[2023.1] = "af784f742dad0ca6e69e05baf8de51152c396b9a" |
| 15 | ESW_REV[2023.2] = "e847e1935dca630615e5f7dc694365a44b89699c" | 15 | ESW_REV[2023.2] = "e847e1935dca630615e5f7dc694365a44b89699c" |
| 16 | ESW_REV[2024.1] = "827c36863db8e94c1b46e1f40fbc636467913589" | 16 | ESW_REV[2024.1] = "18910bd57542d5b3cdc04e4442e565e065685e88" |
| 17 | SRCREV ??= "${@d.getVarFlag('ESW_REV', d.getVar('ESW_VER')) or 'INVALID'}" | 17 | SRCREV ??= "${@d.getVarFlag('ESW_REV', d.getVar('ESW_VER')) or 'INVALID'}" |
| 18 | 18 | ||
| 19 | EMBEDDEDSW_BRANCHARG ?= "${@['nobranch=1', 'branch=${BRANCH}'][d.getVar('BRANCH') != '']}" | 19 | EMBEDDEDSW_BRANCHARG ?= "${@['nobranch=1', 'branch=${BRANCH}'][d.getVar('BRANCH') != '']}" |