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-rw-r--r--meta-microblaze/recipes-devtools/gcc/gcc-13/0033-fixed-below-issues-Floating-point-print-issues-in-64.patch304
1 files changed, 304 insertions, 0 deletions
diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-13/0033-fixed-below-issues-Floating-point-print-issues-in-64.patch b/meta-microblaze/recipes-devtools/gcc/gcc-13/0033-fixed-below-issues-Floating-point-print-issues-in-64.patch
new file mode 100644
index 00000000..cf1076ea
--- /dev/null
+++ b/meta-microblaze/recipes-devtools/gcc/gcc-13/0033-fixed-below-issues-Floating-point-print-issues-in-64.patch
@@ -0,0 +1,304 @@
1From 58d4d2ca4fdf90d9d21e7813a599b3491f52e34d Mon Sep 17 00:00:00 2001
2From: Mahesh Bodapati <mbodapat@xilinx.com>
3Date: Tue, 13 Sep 2022 15:28:58 +0530
4Subject: [PATCH 33/54] fixed below issues: - Floating point print issues in
5 64bit mode - Dejagnu Jump related issues - Added dbl instruction
6
7 Conflicts:
8 gcc/config/microblaze/microblaze.md
9---
10 gcc/config/microblaze/microblaze.cc | 12 +++-
11 gcc/config/microblaze/microblaze.h | 7 +++
12 gcc/config/microblaze/microblaze.md | 86 ++++++++++++++++++++++++-----
13 libgcc/config/microblaze/crti.S | 24 +++++++-
14 libgcc/config/microblaze/crtn.S | 13 +++++
15 5 files changed, 125 insertions(+), 17 deletions(-)
16
17diff --git a/gcc/config/microblaze/microblaze.cc b/gcc/config/microblaze/microblaze.cc
18index 6fbecb43e4a..965a041ea8c 100644
19--- a/gcc/config/microblaze/microblaze.cc
20+++ b/gcc/config/microblaze/microblaze.cc
21@@ -2479,7 +2479,12 @@ print_operand (FILE * file, rtx op, int letter)
22 if (code == CONST_DOUBLE)
23 {
24 if (GET_MODE (op) == DFmode)
25- REAL_VALUE_TO_TARGET_DOUBLE (*CONST_DOUBLE_REAL_VALUE (op), val);
26+ {
27+ if (TARGET_MB_64)
28+ REAL_VALUE_TO_TARGET_LONG_DOUBLE (*CONST_DOUBLE_REAL_VALUE (op), val);
29+ else
30+ REAL_VALUE_TO_TARGET_DOUBLE (*CONST_DOUBLE_REAL_VALUE (op), val);
31+ }
32 else
33 {
34 REAL_VALUE_TO_TARGET_DOUBLE (*CONST_DOUBLE_REAL_VALUE (op), l);
35@@ -3886,7 +3891,10 @@ microblaze_expand_divide (rtx operands[])
36 gen_rtx_PLUS (QImode, regt1, div_table_rtx));
37
38 insn = emit_insn (gen_zero_extendqisi2(operands[0],mem_rtx));
39- jump = emit_jump_insn_after (gen_jump (div_end_label), insn);
40+ if (TARGET_MB_64)
41+ jump = emit_jump_insn_after (gen_jump_64 (div_end_label), insn);
42+ else
43+ jump = emit_jump_insn_after (gen_jump (div_end_label), insn);
44 JUMP_LABEL (jump) = div_end_label;
45 LABEL_NUSES (div_end_label) = 1;
46 emit_barrier ();
47diff --git a/gcc/config/microblaze/microblaze.h b/gcc/config/microblaze/microblaze.h
48index 3aee003de0d..145368db8b8 100644
49--- a/gcc/config/microblaze/microblaze.h
50+++ b/gcc/config/microblaze/microblaze.h
51@@ -888,10 +888,17 @@ do { \
52 /* We do this to save a few 10s of code space that would be taken up
53 by the call_FUNC () wrappers, used by the generic CRT_CALL_STATIC_FUNCTION
54 definition in crtstuff.c. */
55+#ifdef __arch64__
56+#define CRT_CALL_STATIC_FUNCTION(SECTION_OP, FUNC) \
57+ asm ( SECTION_OP "\n" \
58+ "\tbrealid r15, " #FUNC "\n\t nop\n" \
59+ TEXT_SECTION_ASM_OP);
60+#else
61 #define CRT_CALL_STATIC_FUNCTION(SECTION_OP, FUNC) \
62 asm ( SECTION_OP "\n" \
63 "\tbrlid r15, " #FUNC "\n\t nop\n" \
64 TEXT_SECTION_ASM_OP);
65+#endif
66
67 /* We need to group -lm as well, since some Newlib math functions
68 reference __errno! */
69diff --git a/gcc/config/microblaze/microblaze.md b/gcc/config/microblaze/microblaze.md
70index 72c2a9a38cd..b3d265d9941 100644
71--- a/gcc/config/microblaze/microblaze.md
72+++ b/gcc/config/microblaze/microblaze.md
73@@ -527,6 +527,15 @@
74 (set_attr "mode" "SF")
75 (set_attr "length" "4")])
76
77+(define_insn "floatdidf2"
78+ [(set (match_operand:DF 0 "register_operand" "=d")
79+ (float:DF (match_operand:DI 1 "register_operand" "d")))]
80+ "TARGET_MB_64"
81+ "dbl\t%0,%1"
82+ [(set_attr "type" "fcvt")
83+ (set_attr "mode" "DF")
84+ (set_attr "length" "4")])
85+
86 (define_insn "fix_truncsfsi2"
87 [(set (match_operand:SI 0 "register_operand" "=d")
88 (fix:SI (match_operand:SF 1 "register_operand" "d")))]
89@@ -1299,7 +1308,7 @@
90 (define_insn "movdi_long_int"
91 [(set (match_operand:DI 0 "nonimmediate_operand" "=d")
92 (match_operand:DI 1 "general_operand" "i"))]
93- ""
94+ "TARGET_MB_64"
95 "addlik\t%0,r0,%h1\n\tbsllli\t%0,%0,32\n\taddlik\t%0,%0,%j1 #li => la";
96 [(set_attr "type" "no_delay_arith")
97 (set_attr "mode" "DI")
98@@ -1582,7 +1591,7 @@
99 return "ll%i1\t%0,%1";
100 case 3:
101 {
102- return "addlik\t%0,r0,%h1 \n\tbsllli\t%0,%0,32\n\taddlik\t%0,%0,%j1 #Xfer Lo";
103+ return "addlik\t%0,r0,%j1 \n\tbsllli\t%0,%0,32\n\taddlik\t%0,%0,%h1 #Xfer Lo";
104 }
105 case 5:
106 return "sl%i0\t%1,%0";
107@@ -2371,9 +2380,9 @@ else
108
109 (define_insn "long_branch_compare"
110 [(set (pc)
111- (if_then_else (match_operator 0 "cmp_op"
112- [(match_operand 1 "register_operand" "d")
113- (match_operand 2 "register_operand" "d")
114+ (if_then_else (match_operator:DI 0 "cmp_op"
115+ [(match_operand:DI 1 "register_operand" "d")
116+ (match_operand:DI 2 "register_operand" "d")
117 ])
118 (label_ref (match_operand 3))
119 (pc)))
120@@ -2495,6 +2504,20 @@ else
121 ;;----------------------------------------------------------------
122 ;; Unconditional branches
123 ;;----------------------------------------------------------------
124+(define_insn "jump_64"
125+ [(set (pc)
126+ (label_ref (match_operand 0 "" "")))]
127+ "TARGET_MB_64"
128+ {
129+ if (GET_CODE (operands[0]) == REG)
130+ return "brea%?\t%0";
131+ else
132+ return "breai%?\t%l0";
133+ }
134+ [(set_attr "type" "jump")
135+ (set_attr "mode" "none")
136+ (set_attr "length" "4")])
137+
138 (define_insn "jump"
139 [(set (pc)
140 (label_ref (match_operand 0 "" "")))]
141@@ -2540,17 +2563,25 @@ else
142 {
143 //gcc_assert (GET_MODE (operands[0]) == Pmode);
144
145- if (!flag_pic || TARGET_PIC_DATA_TEXT_REL)
146- emit_jump_insn (gen_tablejump_internal1 (operands[0], operands[1]));
147- else
148- emit_jump_insn (gen_tablejump_internal3 (operands[0], operands[1]));
149+ if (!flag_pic || TARGET_PIC_DATA_TEXT_REL) {
150+ if (!TARGET_MB_64)
151+ emit_jump_insn (gen_tablejump_internal1 (operands[0], operands[1]));
152+ else
153+ emit_jump_insn (gen_tablejump_internal2 (operands[0], operands[1]));
154+ }
155+ else {
156+ if (!TARGET_MB_64)
157+ emit_jump_insn (gen_tablejump_internal3 (operands[0], operands[1]));
158+ else
159+ emit_jump_insn (gen_tablejump_internal4 (operands[0], operands[1]));
160+ }
161 DONE;
162 }
163 )
164
165 (define_insn "tablejump_internal1"
166 [(set (pc)
167- (match_operand 0 "register_operand" "d"))
168+ (match_operand:SI 0 "register_operand" "d"))
169 (use (label_ref (match_operand 1 "" "")))]
170 ""
171 "bra%?\t%0 "
172@@ -2558,11 +2589,21 @@ else
173 (set_attr "mode" "none")
174 (set_attr "length" "4")])
175
176+(define_insn "tablejump_internal2"
177+ [(set (pc)
178+ (match_operand:DI 0 "register_operand" "d"))
179+ (use (label_ref (match_operand 1 "" "")))]
180+ "TARGET_MB_64"
181+ "bra%?\t%0 "
182+ [(set_attr "type" "jump")
183+ (set_attr "mode" "none")
184+ (set_attr "length" "4")])
185+
186 (define_expand "tablejump_internal3"
187 [(parallel [(set (pc)
188- (plus (match_operand 0 "register_operand" "d")
189- (label_ref (match_operand:SI 1 "" ""))))
190- (use (label_ref (match_dup 1)))])]
191+ (plus:SI (match_operand:SI 0 "register_operand" "d")
192+ (label_ref:SI (match_operand:SI 1 "" ""))))
193+ (use (label_ref:SI (match_dup 1)))])]
194 ""
195 ""
196 )
197@@ -2593,6 +2634,23 @@ else
198 ""
199 )
200
201+(define_insn ""
202+ [(set (pc)
203+ (plus:DI (match_operand:DI 0 "register_operand" "d")
204+ (label_ref:DI (match_operand 1 "" ""))))
205+ (use (label_ref:DI (match_dup 1)))]
206+ "TARGET_MB_64 && NEXT_INSN (as_a <rtx_insn *> (operands[1])) != 0
207+ && GET_CODE (PATTERN (NEXT_INSN (as_a <rtx_insn *> (operands[1])))) == ADDR_DIFF_VEC
208+ && flag_pic"
209+ {
210+ output_asm_insn ("addlk\t%0,%0,r20",operands);
211+ return "bra%?\t%0";
212+}
213+ [(set_attr "type" "jump")
214+ (set_attr "mode" "none")
215+ (set_attr "length" "4")])
216+
217+
218 ;;----------------------------------------------------------------
219 ;; Function prologue/epilogue and stack allocation
220 ;;----------------------------------------------------------------
221@@ -3101,7 +3159,7 @@ else
222 ;; The insn to set GOT. The hardcoded number "8" accounts for $pc difference
223 ;; between "mfs" and "addik" instructions.
224 (define_insn "set_got"
225- [(set (match_operand:SI 0 "register_operand" "=r")
226+ [(set (match_operand 0 "register_operand" "=r")
227 (unspec:SI [(const_int 0)] UNSPEC_SET_GOT))]
228 ""
229 "mfs\t%0,rpc\n\taddik\t%0,%0,_GLOBAL_OFFSET_TABLE_+8"
230diff --git a/libgcc/config/microblaze/crti.S b/libgcc/config/microblaze/crti.S
231index 1a89a0a2ffa..7cf5664880b 100644
232--- a/libgcc/config/microblaze/crti.S
233+++ b/libgcc/config/microblaze/crti.S
234@@ -33,11 +33,32 @@
235 .section .init, "ax"
236 .global __init
237
238+#ifdef __arch64__
239 .weak _stack
240- .set _stack, 0xffffffff
241+ .set _stack, 0xffffffffffffffff
242 .weak _stack_end
243 .set _stack_end, 0
244
245+ .align 3
246+__init:
247+ addlik r1, r1, -32
248+ sl r15, r0, r1
249+ addlik r11, r0, _stack
250+ mts rshr, r11
251+ addlik r11, r0, _stack_end
252+ mts rslr, r11
253+
254+ .section .fini, "ax"
255+ .global __fini
256+ .align 3
257+__fini:
258+ addlik r1, r1, -32
259+ sl r15, r0, r1
260+#else
261+ .weak _stack
262+ .set _stack, 0xffffffff
263+ .weak _stack_end
264+ .set _stack_end, 0
265 .align 2
266 __init:
267 addik r1, r1, -16
268@@ -53,3 +74,4 @@ __init:
269 __fini:
270 addik r1, r1, -16
271 sw r15, r0, r1
272+#endif
273diff --git a/libgcc/config/microblaze/crtn.S b/libgcc/config/microblaze/crtn.S
274index 29a004973ae..9697b247b6c 100644
275--- a/libgcc/config/microblaze/crtn.S
276+++ b/libgcc/config/microblaze/crtn.S
277@@ -29,7 +29,19 @@
278 .section .note.GNU-stack,"",%progbits
279 .previous
280 #endif
281+#ifdef __arch64__
282+ .section .init, "ax"
283+ ll r15, r0, r1
284+ addlik r1, r1, 32
285+ rtsd r15, 8
286+ nop
287
288+ .section .fini, "ax"
289+ ll r15, r0, r1
290+ addlik r1, r1, 32
291+ rtsd r15, 8
292+ nop
293+#else
294 .section .init, "ax"
295 lw r15, r0, r1
296 rtsd r15, 8
297@@ -39,3 +51,4 @@
298 lw r15, r0, r1
299 rtsd r15, 8
300 addik r1, r1, 16
301+#endif
302--
3032.34.1
304