| Commit message (Collapse) | Author | Age | Files | Lines |
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Signed-off-by: Mark Hatle <mark.hatle@amd.com>
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Remove most direct references to WORKDIR.
S = "${WORKDIR}" is no longer allowed, adjust this to refer to UNPACKDIR
${WORKDIR}/package is also incorrect, adjust to ${PKGD}.
Signed-off-by: Mark Hatle <mark.hatle@amd.com>
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crypto: xilinx: aes-gcm: Initialize key source with default value
misc: xilinx-ai-engine: Remove extra of_node_get in aperture probe
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Revert "crypto: zynqmp-aes-gcm: Initialise key source before use"
misc: xilinx-ai-engine: Clock gating issue on multi partition flow on VEK280
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crypto: zynqmp-aes-gcm: Initialise key source before use
iio: adc: versal-sysmon-i2c: Return max temp on i2c read failure
iio: adc: versal-sysmon: Report temperature and voltage channels in milli-scale
arm64: zynqmp: Fix pwm-fan polarity
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These are not supported on versal-net at this time, remove the COMPATIBLE_MACHINE.
Signed-off-by: Mark Hatle <mark.hatle@amd.com>
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We only want to build for select AMD FPGAs.
Signed-off-by: Mark Hatle <mark.hatle@amd.com>
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Change log:
dt-bindings: hdmi-tx-ss: Convert HDMI Tx DT documentation to yaml format
dt-bindings: hdmi-rx-ss: Convert HDMI Rx DT documentation to yaml format
vphy: Add support for clock primitive
dt-bindings: vphy: Add dt entries for Tx/Rx clock primitive
Signed-off-by: Rajesh Gugulothu <rajesh.gugulothu@amd.com>
Signed-off-by: Mark Hatle <mark.hatle@amd.com>
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Signed-off-by: Mark Hatle <mark.hatle@amd.com>
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media: xilinx: xilinx-hdmirxss: redefine HDCP1X ioctl type with macro
v4l: xilinx: hdmirx: Add HDCP2x support
v4l: xilinx: hdcp2xrx: Add HDMI support for HDCP2X Protocol
v4l: xilinx: hdcp2xrx: Enable DDC Reset
v4l: xilinx: hdcp2xrx: Add HDCP2X rxstatus register
v4l: xilinx: hdcp2xrx: Remove unused variable
v4l: xilinx: hdcp2xrx: Add check to detect HDCP22 protocol events
v4l: xilinx: hdcp2xrx: Add method to enable disable HDCP22 version
v4l: xilinx: hdcp2xrx: Add HDCP22 RNG and MMUL offsets for HDMI Rx
v4l: xilinx: hdmirx: Select HDCP2x Rx
v4l: xilinx: hdmirx: Select CRYTPO_AES
v4l: xilinx: Fix method of getting hdcp1x interrupt by name
v4l: xilinx: Fix method of getting HDMI Rx irq
dt-bindings: media: xilinx: Add HDCP interrupts to HDMI RX subsystem
v4l: xilinx: hdcp2xrx: Fix incorrect msg_ids causing failure
v4l: xilinx: hdcp2xrx: Generalize HDCP rw callback handler naming
usb: misc: onboard_usb_dev: skip suspend/resume sequence for USB5744 SMBus support
crypto: zynqmp-aes-gcm: Fix out of bound memory write
misc: xilinx-ai-engine: Dont use write8 and write16
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misc: xilinx-ai-engine: Fixed CPU stall while part release
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xlnx-zynqmp: Add static inline keyword for function defination
crypto: zynqmp-aes-gcm: Fix memory leak
misc: xilinx_puf: Add module param and ioctl to clear PUF ID and PUF Key
crypto: zynqmp-aes-gcm: Align parameters with parenthesis
crypto: zynqmp-aes-gcm: Clear AES user key
zynqmp: Add command ids to clear keys
crypto: xilinx-ecdsa: Fix memory leak in setkey
crypto: xilinx-ecdsa: Align parameters with parenthesis
crypto: xilinx-ecdsa: Fix buffer overflow in ecdsa-nist-p521
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misc: xilinx-ai-engine: Fixed invalid start column/number of column error and Tile gated issue.
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spi: spi-xilinx: Simplify clock management by using clk_bulk*() APIs
dmaengine: zynqmp_dma: Fix the reset value of dma channels
net: axienet: Add GRO Multiple Port Support
net: axienet: Add EOE GRO support for RX
net: axienet: Add Page allocation/deallocation for GRO
net: axienet: Add page in struct aximcdma_bd for GRO
net: axienet: Add EOE GSO and checksum support for TX
net: axienet: Add ethernet offload engine support
dt-bindings: net: xlnx,axi-ethernet: Add bindings documentation for Ethernet Offload Engine
dt-bindings: net: xlnx,axi-ethernet: Align examples reg property addressing to 32-bit
dt-bindings: net: xlnx,axi-ethernet: Add missing reg minItems
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phy: xilinx-xhdmiphy: Fix video/link ready signals not getting asserted
arm64: versal-net: Also remove emu/ipp from Makefile
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xilinx-ai-engine: remove unused core_reg struct definitions
xilinx-ai-engine: remove old core_regs for aie1 arch
xilinx-ai-engine: remove old core_regs for aieml arch
xilinx-ai-engine: Remove old aie_part_clear_core_regs call
xilinx-ai-engine: Add new api to clear the core regs
xilinx-ai-engine: Add definitions for core regs to be zeroized for aie1
xilinx-ai-engine: Add core regs group for aieml arch
xilinx-ecdsa: Fix panic on rmmod by updating platform driver data handling
net: axienet: Use XAXIENET_1_2p5G MAC type for AXI 1G/2.5G ethernet
dt-bindings: net: xlnx,axi-ethernet: Correct description of "xlnx,switch-x-sgmii" property
net: emaclite: Adopt clock support
net: emaclite: Replace alloc_etherdev() with devm_alloc_etherdev()
dt-bindings: net: emaclite: Add clock support
staging: xilinx-tsn: Add IRQ-safe spinlock to protect TX BD processing
misc: xilinx-ai-engine: Added support for DMABUF SYNC IOCTL
misc: xilinx-ai-engine: Added support to map/unmap dmabuf
misc: xilinx-ai-engine: Added support to mmap dmabuf fd
misc: xilinx-ai-engine: Added support to free dma memory
misc: xilinx-ai-engine: Added support to allocate dma memory
irqchip: xilinx: Add missing null check for of_find_device_by_node()
PCI: xilinx-cpm: Add support for Versal CPM5 Root Port controller 1
dt-bindings: PCI: xilinx-cpm: Add compatible string for CPM5 host1
drm: xlnx: hdmi: Add support for reading 4 block EDID
phy: xilinx-xhdmiphy: Fix FRL mode issue with versal devices
staging: xilinx-tsn: Enable Traffic Shaping Support with QDisc Framework
misc: xilinx-ai-engine: Add APIs to get existing AIE partitionsfd list to facilitating debugging
watchdog: xilinx_wwdt: Calculate max_hw_heartbeat_ms using clock frequency
Revert "watchdog: xilinx_wwdt: Add check for timeout limit and set maximum value if exceeded"
arm64: xilinx: Fix file location described in zynqmp-p-a2197-00-revA.dts
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crypto: Update HASH_MAX_DESCSIZE to include space for fallback tfm.
arm64: zynqmp: Update the usb5744 hub node as per binding
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nvmem: xlnx_secure: Fix buffer overflow warning reported with allmodconfig.
staging: xilinx-tsn: fix ptp sync failure
arm64: xilinx: enable onboard USB hub driver
usb: misc: onboard_usb_dev: add Microchip usb5744 SMBus programming support
usb: misc: onboard_dev: extend platform data to add power on delay field
usb: misc: onboard_hub: rename to onboard_dev
misc: xilinx-ai-engine: Added support to update shim bd
ufs: amd-versal2: Clean code around return
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This reverts commit 2c44c115a6973cf4b4877b217e03fe9f510ff4bf.
This workaround is no longer needed in Scarthgap.
Signed-off-by: Mark Hatle <mark.hatle@amd.com>
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arm: dts: Add cap-mmc-hw-reset and no-sd, no-sdio property to eMMC
media: i2c: ap1302: Add test pattern control
net: axienet: Use XAE_IE_OFFSET register for AXI 1G MAC only
net: axienet: Make ethtool hooks static to limit their scope
net: axienet: Fix kernel doc warnings
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mmc: sdhci-of-arasan: Support for emmc hardware reset
arm64: versal-net: Add xilsem edac node
drm: xlnx: hdcp: Add missing EXPORT_SYMBOL_GPL
drm: xlnx: hdcp: Fix incompatible typecast error
v4l: xilinx: dprx: Limit stack frame size to 1024 bytes
staging: xilinx_hdcp: Add missing EXPORT_SYMBOL_GPL
v4l: xilinx: dprx: Add missing EXPORT_SYMBOL_GPL
misc: xilinx_puf: Fix variable used uninitialized warning
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iio: adc: versal-sysmon: Redefine HBM temperature channel
iio: adc: versal-sysmon: Adds oversampling/averaging feature sets
iio: adc: versal-sysmon: Macro definition change for reusability
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misc: xilinx_puf: Cleanup platform device resource on module exit
crypto: xilinx/zynqmp-aes-gcm: Fix return error code of GCM decrypt operation
Reapply "dt-bindings: Add binding for IDT 8T49N24x UFT"
PCI: xilinx-xdma: Add Xilinx QDMA Root Port driver
dt-bindings: PCI: xilinx-xdma: Add schemas for Xilinx QDMA PCIe Root Port Bridge
net: axienet: Add support for DCMAC ethernet IP
dt-bindings: net: xlnx,axi-ethernet: Add bindings for DCMAC
net: axienet: Add gt_reset hook in struct axienet_config to reset GT
net: axienet: Rename MRMAC specific reset delay macro to generic one
net: phylink: Add phy interfaces 100Gbase-r, 200Gbase-r and 400Gbase-r
net: phy: Add phy interfaces 100Gbase-r, 200Gbase-r and 400Gbase-r
arm64: xilinx: Remove current-speed property from pl011
arm64: versal-net: add OSPI reset gpio for VNX board
usb: dwc3: core: Prevent phy suspend during init
xilinx-ecdsa: Export ASN decoding function from ecdsa module
crypto: xilinx: Cleanup platform device resource on module exit
phy: xilinx: phy-zynqmp: Fix SGMII linkup failure on resume
irqchip: xilinx: adopt clock support
staging: tsmux: Fix module autoloading
gpio: zynqmp-modepin: Fix module autoloading
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net: axienet: Deprecate xlnx,mrmac-rate and switch to generic max-speed binding
dt-bindings: net: xlnx,axi-ethernet: Use "max-speed" device tree property
arm64: xilinx: Enable UFS, ARM SCMI in default config
ufs: amd-versal2: Disable AUTO_HIBERN8 and HS modes
ufs: amd-versal2: Add AMD Versal Gen 2 UFS support
ufs: core: Add vendor specific ops to handle interrupts
firmware: xilinx: Add UFS interface API support for Versal Gen 2
dt-bindings: ufs: amd-versal2: Add support for AMD Versal Gen 2 UFS
edac: xilsem: Add error event handling support for Versal NET platform
dmaengine: zynqmp_dma: Add support for AMD Versal Gen 2 DMA IP
dt-bindings: dmaengine: zynqmp_dma: Add a new compatible string
staging: xilinx-tsn: Add Endpoint Packet Switch Feature and Control Frame Handling for STP/LLDP
dt-bindings: staging: xilinx_tsn_ep_ex: Deprecate packet-switch property
dt-bindings: staging: xilinx_tsn_ep: Add Endpoint Packet Switch support
arm64: configs: Enable CRYPTO_DEV_XILINX_ECDSA by default
crypto: xilinx: Add NIST P-521 curve support in ECDSA Driver
remoteproc: zynqmp_r5: Update power domains property to power-domains
crypto: x509 - Add OID for NIST P521 and extend parser for it
crypto: asymmetric_keys - Adjust signature size calculation for NIST P521
crypto: ecdsa - Register NIST P521 and extend test suite
crypto: ecdsa - Rename keylen to bufsize where necessary
crypto: ecdsa - Replace ndigits with nbits where precision is needed
crypto: ecc - Add NIST P521 curve parameters
crypto: ecc - Add special case for NIST P521 in ecc_point_mult
crypto: ecc - Implement vli_mmod_fast_521 for NIST p521
crypto: ecc - Add nbits field to ecc_curve structure
crypto: ecdsa - Extend res.x mod n calculation for NIST P521
crypto: ecdsa - Adjust tests on length of key parameters
crypto: ecdsa - Convert byte arrays with key coordinates to digits
crypto: ecc - Use ECC_CURVE_NIST_P192/256/384_DIGITS where possible
i2c: cadence: Add atomic transfer support for controller version 1.4
i2c: cadence: Split cdns_i2c_master_xfer for Atomic Mode
i2c: cadence: Relocate cdns_i2c_runtime_suspend and cdns_i2c_runtime_resume to facilitate atomic mode
i2c: cadence: remove printout on handled timeouts
i2c: cadence: Add system suspend and resume PM support
misc: xilinx-ai-engine: Add condition compilation flag
irqchip/xilinx: Fix shift out of bounds
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This reverts commit 110ab8cc450c4a17b5b62ceb96fd0bd8a0364e3d.
Triggers a problem booting Kria boards. Reverting until we can understand why.
Signed-off-by: Mark Hatle <mark.hatle@amd.com>
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Signed-off-by: Jonathan Stroud <jonathan.stroud@amd.com>
Signed-off-by: Sandeep Gundlupet Raju <sandeep.gundlupet-raju@amd.com>
Signed-off-by: Mark Hatle <mark.hatle@amd.com>
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net: axienet: Deprecate xlnx,mrmac-rate and switch to generic max-speed binding
dt-bindings: net: xlnx,axi-ethernet: Use "max-speed" device tree property
arm64: xilinx: Enable UFS, ARM SCMI in default config
ufs: amd-versal2: Disable AUTO_HIBERN8 and HS modes
ufs: amd-versal2: Add AMD Versal Gen 2 UFS support
ufs: core: Add vendor specific ops to handle interrupts
firmware: xilinx: Add UFS interface API support for Versal Gen 2
dt-bindings: ufs: amd-versal2: Add support for AMD Versal Gen 2 UFS
edac: xilsem: Add error event handling support for Versal NET platform
dmaengine: zynqmp_dma: Add support for AMD Versal Gen 2 DMA IP
dt-bindings: dmaengine: zynqmp_dma: Add a new compatible string
staging: xilinx-tsn: Add Endpoint Packet Switch Feature and Control Frame Handling for STP/LLDP
dt-bindings: staging: xilinx_tsn_ep_ex: Deprecate packet-switch property
dt-bindings: staging: xilinx_tsn_ep: Add Endpoint Packet Switch support
arm64: configs: Enable CRYPTO_DEV_XILINX_ECDSA by default
crypto: xilinx: Add NIST P-521 curve support in ECDSA Driver
remoteproc: zynqmp_r5: Update power domains property to power-domains
crypto: x509 - Add OID for NIST P521 and extend parser for it
crypto: asymmetric_keys - Adjust signature size calculation for NIST P521
crypto: ecdsa - Register NIST P521 and extend test suite
crypto: ecdsa - Rename keylen to bufsize where necessary
crypto: ecdsa - Replace ndigits with nbits where precision is needed
crypto: ecc - Add NIST P521 curve parameters
crypto: ecc - Add special case for NIST P521 in ecc_point_mult
crypto: ecc - Implement vli_mmod_fast_521 for NIST p521
crypto: ecc - Add nbits field to ecc_curve structure
crypto: ecdsa - Extend res.x mod n calculation for NIST P521
crypto: ecdsa - Adjust tests on length of key parameters
crypto: ecdsa - Convert byte arrays with key coordinates to digits
crypto: ecc - Use ECC_CURVE_NIST_P192/256/384_DIGITS where possible
i2c: cadence: Add atomic transfer support for controller version 1.4
i2c: cadence: Split cdns_i2c_master_xfer for Atomic Mode
i2c: cadence: Relocate cdns_i2c_runtime_suspend and cdns_i2c_runtime_resume to facilitate atomic mode
i2c: cadence: remove printout on handled timeouts
i2c: cadence: Add system suspend and resume PM support
misc: xilinx-ai-engine: Add condition compilation flag
irqchip/xilinx: Fix shift out of bounds
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Add initial version of recipe for building HDMI v2.1 FMC module
Signed-off-by: Rajesh Gugulothu <rajesh.gugulothu@amd.com>
Signed-off-by: Mark Hatle <mark.hatle@amd.com>
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Revert "arm64: xilinx: Enable SMMU by default"
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Upstream poky/oe-core contains the exact same recipe. Remove the local one and
let upstream maintain it.
Signed-off-by: Trevor Woerner <trevor.woerner@amd.com>
Signed-off-by: Sandeep Gundlupet Raju <sandeep.gundlupet-raju@amd.com>
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Revert "irqchip: gic: Add changes to handle SGI for Zynq Remoteproc driver"
Revert "irqchip: gic: Add remoteproc changes to the driver"
staging: xilinx-tsn: fix kernel crash when new bridge if is created
dma: xilinx_dpdma: Fix locking
Revert "dmaengine: xilinx: dpdma: Fix race condition in vsync IRQ"
EDAC/synopsys: Fix error injection on Zynq UltraScale+
remoteproc: zynq: remove openamp support for Zynq-7000
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clk: idt: Fix incompatible function pointer types error
mailbox: zynqmp-ipi: Make polling period configurable
drm: xlnx: Fix DRM_XLNX_HDCP configuration
ASoC: xilinx: Add missing module descriptions
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Changelog:
dmaengine: xilinx: dpdma: removed extra vchan lock
arm64: zynqmp: Fix pwm-fan polarity
arm64: versal-net: Enable sysmon for VN-P-B2197 revA board
Revert "Revert "clk: Add ccf driver for IDT 8T49N24x UFT""
firmware: xilinx: Fix buffer overflow in config_reg_store
v4l: xilinx: isppipeline: Add support for ISP-ENABLE and restructure xisp_dev to resolve pahole issues
v4l: xilinx: isppipeline: Add support for RESIZE
v4l: xilinx: isppipeline: Add support for MEDIAN
v4l: xilinx: isppipeline: Add support for CLAHE
v4l: xilinx: isppipeline: Add support for RGB STATS
v4l: xilinx: isppipeline: Add support for LUMA STATS
v4l: xilinx: isppipeline: Add support for BAYER STATS
v4l: xilinx: isppipeline: Add support for CSC
v4l: xilinx: isppipeline: Add support for 3DLUT
v4l: xilinx: isppipeline: Add support for Tone mapping
v4l: xilinx: isppipeline: Add support for HDR
v4l: xilinx: isppipeline: Add support for GAMMA CORRECTION
v4l: xilinx: isppipeline: Add support for Gain Control
v4l: xilinx: isppipeline: Add support for CCM
v4l: xilinx: isppipeline: Add support for DEMOSAIC
v4l: xilinx: isppipeline: Add support for LSC
v4l: xilinx: isppipeline: Add support for RGBIR
v4l: xilinx: isppipeline: Add support for DEGAMMA
v4l: xilinx: isppipeline: Add support for BPC
v4l: xilinx: isppipeline: Add support for AWB
v4l: xilinx: isppipeline: Add support for BLC
v4l: xilinx: isppipeline: Add support for AEC
v4l: xilinx: isppipeline: Add compatible string for v2.0
dt-bindings: media: xilinx: Add documentation for ISP-2.0
usb: misc: usb5744: Increase post reset delay
arm64: xilinx: Enable SMMU by default
include: linux: firmware: correct versal-net sw error event masks
usb: dwc3: Export symbol dwc3_host_wakeup_register/capable
firmware: xilinx: fix feature check logic for TF-A specific APIs
arm64: zynqmp: dts: Add rts delay property for rs485 mode on KD240
drivers: iio: adc: xilinx-ams: Add module description
arm64: dts: zynqmp: zcu106a: Remove dpcon node
v4l: xilinx: isppipeline: Fix comment around Red Gain
phy: xilinx-xhdmiphy: Add support for selection of PLL/MMCM clock primitive
dt-bindings: phy: v-hdmi-phy1: Add dt entries for Tx/Rx clock primitives
Signed-off-by: Mark Hatle <mark.hatle@amd.com>
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Signed-off-by: Mark Hatle <mark.hatle@amd.com>
(cherry picked from commit 1ab38403e91e5cfdf08852c06e5583f707aa53c1)
Signed-off-by: Mark Hatle <mark.hatle@amd.com>
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Signed-off-by: Mark Hatle <mark.hatle@amd.com>
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Updated commit ID to latest HEAD
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Updated commit ID to latest HEAD
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Updated commit ID to latest HEAD
Signed-off-by: Mark Hatle <mark.hatle@amd.com>
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Signed-off-by: Mark Hatle <mark.hatle@amd.com>
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Updated commit ID to latest HEAD
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Updated commit ID to latest HEAD
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SOC_VARIANT has been remove, we are now only using the YP standard SOC_FAMILY
configuration. The defined families are: zynq, zynqmp, versal and versal-net.
Our decision of breaking up versal-net from versal, is based on the SoC CPU
changes from cortexa72/r5 to cortexa78/r52, thus we're treating it as a
different SoC family.
In order to capture the individual capabilities that we used to handle via
SOC_VARIANT, we have defined the following features (some may have been
previously defined):
- mali400 (zynqmp eg and ev)
- vcu (zynqmp ev)
- rfsoc (zynqmp dr RF capabiltiies)
- aie - (versal ai & premium)
- vdu - (versal ai)
SOC_VARIANT_ARCH and SOC_FAMILY_ARCH are now obsolete and replaced by
MACHINE_ARCH. This is based on the guideline that any recipes that use
MACHINE_FEATURES should be MACHINE_ARCH specific.
Signed-off-by: Mark Hatle <mark.hatle@amd.com>
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Create a new layer containing all code related to the Mali400 graphics
stack and software. This includes the Mali kernel module / patches,
libglu/libgles code, mesa, wayland, kernel recipe and udev rules. This
layer also includes a dynamic layer for the qt5 bbappends and patches.
Signed-off-by: Mark Hatle <mark.hatle@amd.com>
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Signed-off-by: Mark Hatle <mark.hatle@amd.com>
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Signed-off-by: Mark Hatle <mark.hatle@amd.com>
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There is no need for multiple versions, the latest version should work with
all of the kernels we care about. Version has been adjusted to 6.1.60 to
indicate the latest kernel it was actively tested with.
Signed-off-by: Mark Hatle <mark.hatle@amd.com>
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Signed-off-by: Mark Hatle <mark.hatle@amd.com>
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There is no need for multiple versions, the latest version will work with
all of the kernels we care about. Version has been adjusted to 6.1.60 to
indicate the latest kernel it was actively tested with.
Signed-off-by: Mark Hatle <mark.hatle@amd.com>
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The recipe version is now 'major.minor_vivado'. In the future we may
drop the vivado component and just stay with major_minor. But this sets
us up to make that change easier in the future.
Signed-off-by: Mark Hatle <mark.hatle@amd.com>
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SRCPV is no longer needed, Simply various usages.
Signed-off-by: Mark Hatle <mark.hatle@amd.com>
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