| Commit message (Collapse) | Author | Age | Files | Lines |
... | |
| | |
| | |
| | |
| | | |
Signed-off-by: Mark Hatle <mark.hatle@amd.com>
|
| | |
| | |
| | |
| | | |
Signed-off-by: Mark Hatle <mark.hatle@amd.com>
|
| | |
| | |
| | |
| | | |
Signed-off-by: Mark Hatle <mark.hatle@amd.com>
|
| | |
| | |
| | |
| | | |
Signed-off-by: Mark Hatle <mark.hatle@amd.com>
|
| |\ \
| | | |
| | | |
| | | | |
Signed-off-by: Mark Hatle <mark.hatle@amd.com>
|
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | | |
Add a version header file in plain text format required for Versal
machines using the optional data field in the BIF file for version
information
Signed-off-by: John Toomey <john.toomey@amd.com>
Signed-off-by: Mark Hatle <mark.hatle@amd.com>
|
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | | |
Add optional data section to BIF file generation code to be used with
version or other information
Signed-off-by: John Toomey <john.toomey@amd.com>
Signed-off-by: Mark Hatle <mark.hatle@amd.com>
|
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | | |
symlinks don't work on the /boot FAT partition, so change to copy
Signed-off-by: Jonathan Stroud <jonathan.stroud@amd.com>
Signed-off-by: Mark Hatle <mark.hatle@amd.com>
|
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | | |
It is not currently possible to create symlinks in the /boot partition
due to the use of the vfat filesystem and this causes an issue when
trying to update the dtb using rpm packages which contain a symlink.
Work around the issue by copying the dtb file to the symlink location.
Signed-off-by: John Toomey <john.toomey@amd.com>
Signed-off-by: Mark Hatle <mark.hatle@amd.com>
|
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | | |
arm64: zynqmp: Add resets and assigned-clock-rates properties for KD240
Signed-off-by: Manikanta Guntupalli <manikanta.guntupalli@amd.com>
Signed-off-by: Mark Hatle <mark.hatle@amd.com>
|
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | | |
Add a minimal xclbinutil recipe based on the existing XRT recipe
Signed-off-by: John Toomey <john.toomey@amd.com>
Signed-off-by: Mark Hatle <mark.hatle@amd.com>
|
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | | |
Updated branch to master which has changes to support both boards
SC/Kria-SOM
Signed-off-by: Sharath Kumar Dasari <sharath.kumar.dasari@xilinx.com>
Signed-off-by: Mark Hatle <mark.hatle@amd.com>
|
| | | |
| | | |
| | | |
| | | |
| | | | |
Signed-off-by: Jonathan Stroud <jonathan.stroud@amd.com>
Signed-off-by: Mark Hatle <mark.hatle@amd.com>
|
| | | |
| | | |
| | | |
| | | |
| | | | |
Signed-off-by: John Toomey <john.toomey@amd.com>
Signed-off-by: Mark Hatle <mark.hatle@amd.com>
|
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | | |
Last SRCREV update added support for kv260 rev2 which we are now tagging,
releasing for canonical, hence incrementing the version to 1.1
Signed-off-by: Sharath Kumar Dasari <sharathk@amd.com>
Signed-off-by: Mark Hatle <mark.hatle@amd.com>
|
| | | |
| | | |
| | | |
| | | | |
Signed-off-by: Mark Hatle <mark.hatle@amd.com>
|
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | | |
Add in necessary libmetal dependency (dynamic)
Patch the sources using the xrt-cstdint.patch where applicable.
Signed-off-by: Mark Hatle <mark.hatle@amd.com>
|
| | | |
| | | |
| | | |
| | | | |
Signed-off-by: Mark Hatle <mark.hatle@amd.com>
|
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | | |
Zocl is tied to XRT, and to the kernel sources. So provide an
older XRT/Zocl combination to allow for older configurations.
Note, 2022.1 -> 2023.1 do not currently work. Zocl builds, but XRT
fails due to issues with gcc 12 and beyond.
Signed-off-by: Mark Hatle <mark.hatle@amd.com>
|
| | | |
| | | |
| | | |
| | | | |
Signed-off-by: Mark Hatle <mark.hatle@amd.com>
|
| | | |
| | | |
| | | |
| | | |
| | | |
| | | | |
EFI components are not enabled in the 2022.1 version.
Signed-off-by: Mark Hatle <mark.hatle@amd.com>
|
| | | |
| | | |
| | | |
| | | | |
Signed-off-by: Mark Hatle <mark.hatle@amd.com>
|
| | | |
| | | |
| | | |
| | | | |
Signed-off-by: Mark Hatle <mark.hatle@amd.com>
|
| | | |
| | | |
| | | |
| | | | |
Signed-off-by: Mark Hatle <mark.hatle@amd.com>
|
| | | |
| | | |
| | | |
| | | | |
Signed-off-by: Mark Hatle <mark.hatle@amd.com>
|
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | | |
Changelog:
driver: src: io_backend: Request tiles before gating clocks
Signed-off-by: Mark Hatle <mark.hatle@amd.com>
|
| | | |
| | | |
| | | |
| | | | |
Signed-off-by: Mark Hatle <mark.hatle@amd.com>
|
|\ \ \ \
| | |_|/
| |/| |
| | | | |
Signed-off-by: Mark Hatle <mark.hatle@amd.com>
|
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | | |
Changelog:
Fix to handle input_ports_details and output_ports_details Interface tiles metric for PLIO designs (#8064)
Changing a copy to a move for when profiling samples are written (#8065)
VITIS-11806 Command-chaining: XRT C++ Command List (#8063)
VITIS-11832 - Support transaction buffer patching in XRT (#8059)
fix printing logs on windows (#8062)
using the correct workspace path for windows (#8061)
Signed-off-by: saumya garg <saumya.garg@amd.com>
Signed-off-by: Mark Hatle <mark.hatle@amd.com>
|
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | | |
microblaze: Change TLB mapping and free space allocation
arm64: versal-net Add dcc node and dcc in aliases for versal-net-ipp-rev1.9.dts
arm64: zynqmp: Disable Tri-state for SDIO
arm64: dts: zynqmp: make hw-ecc as the default ecc mode
mailbox: zynqmp: Enable Bufferless IPI usage on Versal-based SOCs
mailbox: zynqmp: Move buffered IPI setup to of_match selected routine
mailbox: zynqmp: Move of_match structure closer to usage
phy: xilinx-xhdmiphy: Configure retimer at FRL training linerate
video/hdmi: Add support for version 3 AVI Infoframe
phy: xilinx-xhdmiphy: Configure HDMIPHY in TMDS mode
drm: xlnx: hdmi: Set wait event flag for TMDS mode
drm: xlnx: hdmi: Fix TMDS clock calculation for RGB YUV422 YUV444 formats
phy: xilinx-xhdmiphy: Add pll-selection allowed range of values for GTYP/GTYE5
drm: xlnx: hdmi: Fix overwriting the max_frl_rate variable
drm: xlnx: hdmi: Downgrade the FRL rate when sink requests
drm: xlnx: hdmi: Fix lts2 state machine
drm: xlnx: hdmi: Implement xlnx_hdmi_frl_config function
drm: xlnx: hdmi: Implement streamdown callback function
drm: xlnx: hdmi: Add support for all FRL line rates
drm: xlnx: hdmi: Implement streamup callback function
drm: xlnx: hdmi: Implement connect callback function
drm: xlnx: hdmi: Set wait event flag in ltsp state
drm: xlnx: hdmi: Fix FRL link and video clock values
drm: xlnx: hdmi: Fix VTC macros as per the IP specification
phy: xilinx-xhdmiphy: Fix MMCM parameter values for GTYE5/GTYP
drm: xlnx: hdmi: Optimize phy configuration function calls
firmware: xilinx: Dont send linux address to get fpga config get status
|
| | | |
| | | |
| | | |
| | | |
| | | |
| | | | |
fdt_generic_devices: Add phy aliases
arm_generic_fdt: Create ethernet phy in postinit
fdt_generic_util: Add a postinit call back
|
| | | |
| | | |
| | | |
| | | | |
Signed-off-by: Mark Hatle <mark.hatle@amd.com>
|
| | | |
| | | |
| | | |
| | | | |
Signed-off-by: Mark Hatle <mark.hatle@amd.com>
|
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | | |
30bed2b openamp: xlnx: Add vc-p and vn-p models
Signed-off-by: Ben Levinsky <ben.levinsky@amd.com>
Signed-off-by: Mark Hatle <mark.hatle@amd.com>
|
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | | |
Changelog:
Cleanup clangtidy warnings (#8057)
Providing a work-around to allocate instruction buffer in HIP (#8047)
SC warning fix on RAVE and xsabin extension warning fix on Versal (#8053)
aie-status reports fix (#8051)
VITIS-11503 - Dump instruction bo created from Elf so verification can be done (#8043)
VITIS-11503 - change elf section name from mc_code to control-packet (#8054)
Defining Mailbox Macro for QDMA to fix APU crash on RAVE (#8052)
revert sdr changes (#8049)
ML Timeline Plugin should read timestamp data before AIE Profile/Debug (#8045)
Signed-off-by: saumya garg <saumya.garg@amd.com>
Signed-off-by: Mark Hatle <mark.hatle@amd.com>
|
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | | |
openamp: xlnx: versal: match model parsing same as VNET
Signed-off-by: Ben Levinsky <ben.levinsky@amd.com>
Signed-off-by: Mark Hatle <mark.hatle@amd.com>
|
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | | |
net: axienet: Correct tx_buff size when DRE is not enabled
clk: clocking-wizard: calculate dividers fractional parts
v4l: xilinx: dprxss: Fix xhdcp1x_rx_init() function declaration
v4l: xilinx: dprxss: Fix gcc warning
staging: xilinx_hdcp: Fix gcc warning
mtd: spi-nor: Use same bit mask macro in spi & spi-nor core
Revert "drivers: clk: zynqmp: add hack to use old algorithm for divider round rate"
fpga: Fix the reset handling
remoteproc: zynqmp_r5: Clean up support for Versal NET CTCM
mtd: spi-nor: Add support for BP3 at SR bit 5
mtd: spi-nor: Use params->size for flash size info
mtd: spi-nor: Avoid writing EAR register for flashes less than 16MB
mtd: spi-nor: Use nor->info->id[0] for manufacturer id
|
| | | |
| | | |
| | | |
| | | | |
driver:src:Softpartition boundary Isolation fixed
|
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | | |
VEK280 SDT QEMU doesn't come up with PLM, this to default
QEMU_HW_DTB_PS used from versal-generic.conf file doesn't work for
VEK280 machine conf file.
Fix QEMU PLM boot issue by setting the right QEMU_HW_DTB_PS to
board-versal-ps-vek280.dtb and also adjust the QB_MEM to 12GB
to match with board dtsi file, we need set same in QB_MEM
for QEMU boot.
Signed-off-by: Sandeep Gundlupet Raju <sandeep.gundlupet-raju@amd.com>
Signed-off-by: Mark Hatle <mark.hatle@amd.com>
|
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | | |
VHK158 SDT QEMU doesn't come up with PLM, this to default
QEMU_HW_DTB_PS used from versal-generic.conf file doesn't work for
VHK158 machine conf file.
Fix QEMU PLM boot issue by setting the right QEMU_HW_DTB_PS to
board-versal-ps-vmk158.dtb and also adjust the QB_MEM to 32GB
as versal-vhk158-reva.dts has 32GB set, we need set same in QB_MEM
for QEMU boot.
Signed-off-by: Sandeep Gundlupet Raju <sandeep.gundlupet-raju@amd.com>
Signed-off-by: Mark Hatle <mark.hatle@amd.com>
|
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | | |
The SRCREV update contains below commits:
assists: generate_config_object: Enable user-driven customization of library options
assists: generate_config_object: Addressed the scenario where, not all masters are reset masters
lopper:assists:baremetallinker: Do not consider linear SPIs for memory tests
lopper:assists:gen_domain_dts: Remove axi_noc and noc_ddr4 IPs from linux ignore list
base: add expression to clock phandle description
Signed-off-by: Onkar Harsh <onkar.harsh@amd.com>
Signed-off-by: Mark Hatle <mark.hatle@amd.com>
|
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | | |
QEMU PLM error code are observed as shown below.
[13422.262]****************************************
[13422.490]Xilinx Versal Platform Loader and Manager
[13422.508]Release 2024.1 Mar 30 2024 - 14:13:53
[13422.562]Platform Version: v0.0 PMC: v0.0, PS: v0.0
[13422.588]BOOTMODE: 0x5, MULTIBOOT: 0xF0000000
[13422.608]****************************************
[13427.899]Non Secure Boot
[13441.028]PLM Initialization Time
[13441.090]***********Boot PDI Load: Started***********
[13441.191]Loading PDI from SD1
[13441.218]Monolithic/Master Device
[14850.660]1409.510 ms: PDI initialization time
[14850.719]+++Loading Image#: 0x1, Name: lpd, Id: 0x04210002
[14850.755]---Loading Partition#: 0x1, Id: 0xC
[14892.625] 41.831 ms for Partition#: 0x1, Size: 11360 Bytes
[14893.706]---Loading Partition#: 0x2, Id: 0x0
[14902.163] 7.679 ms for Partition#: 0x2, Size: 65104 Bytes
PSM Firmware version: 2024.1 [Build: Mar 30 2024 14:13:53 ]
[15013.595]+++Loading Image#: 0x2, Name: pl_cfi, Id: 0x18700000
[15014.589]---Loading Partition#: 0x3, Id: 0x3
[21947.779]Polling 0xF11A0000 Mask: 0xFFFFFFFF ExpectedValue: 0x14CAA093
[21949.039]MaskPoll: Addr: 0x0F11A0000, Mask: 0xFFFFFFFF, ExpVal: 0x14CAA093, Timeout: 1000000, RegVal: 0x14CA8093 ...ERROR
[21951.067]CMD: 0x00040101 execute failed, Processed Cdo Length 0x84
[21952.260]CMD Payload START, Len:0x00000004
0x00000000F20000A8: 0xF11A0000 0xFFFFFFFF 0x14CAA093 0x00000001
0x00000000F20000B4:
[21954.516]CMD Payload END
[21955.035]Error loading PL data:
CFU_ISR: 0x00000000, CFU_STATUS: 0x0000080C
PMC ERR1: 0x00000000, PMC ERR2: 0x00000000
[21957.810]PLM Error Status: 0x21010001
[21958.489]============Register Dump============
[21959.269]PMC_TAP_IDCODE: 0x14CA8093
[21959.887]EFUSE_CACHE_IP_DISABLE_0(EXTENDED IDCODE): 0x00004000
[21960.901]PMC_TAP_VERSION: 0x03000000
[21961.516]CRP_BOOT_MODE_USER: 0x00000005
[21962.179]CRP_BOOT_MODE_POR: 0x00000005
[21962.823]CRP_RESET_REASON: 0x00000202
[21963.462]PMC_GLOBAL_PMC_MULTI_BOOT: 0xF0000000
[21964.242]PMC_GLOBAL_PWR_STATUS: 0x00000000
[21964.946]PMC_GLOBAL_PMC_GSW_ERR: 0x00000000
[21965.666]PMC_GLOBAL_PLM_ERR: 0x00000000
[21966.342]PMC_GLOBAL_PMC_ERR1_STATUS: 0x00000000
[21967.136]PMC_GLOBAL_PMC_ERR2_STATUS: 0x00000000
[21967.917]PMC_GLOBAL_GICP0_IRQ_STATUS: 0x20000000
[21968.713]PMC_GLOBAL_GICP1_IRQ_STATUS: 0x00000000
[21969.507]PMC_GLOBAL_GICP2_IRQ_STATUS: 0x00000000
[21970.307]PMC_GLOBAL_GICP3_IRQ_STATUS: 0x00000000
[21971.113]PMC_GLOBAL_GICP4_IRQ_STATUS: 0x00000000
[21971.921]PMC_GLOBAL_GICP_PMC_IRQ_STATUS: 0x00000000
[21972.767]============Register Dump============
This is due to default QEMU_HW_DTB_PS used from versal-generic.conf
file doesn't work for VMK180 machine conf file.
Fix QEMU PLM boot issue by setting the right QEMU_HW_DTB_PS to
board-versal-ps-vmk180.dtb.
Signed-off-by: Sandeep Gundlupet Raju <sandeep.gundlupet-raju@amd.com>
Signed-off-by: Mark Hatle <mark.hatle@amd.com>
|
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | | |
Update QEMU_HW_DTB_PMC to use board-versal-pmc-virt.dtb instead of
board-versal-pmc-vc-p-a2197-00.dtb as board-versal-pmc-vc-p-a2197-00.dtb
dtb targets tenzing board.
Signed-off-by: Sandeep Gundlupet Raju <sandeep.gundlupet-raju@amd.com>
Signed-off-by: Mark Hatle <mark.hatle@amd.com>
|
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | | |
arm64: versal-net Add dcc node and dcc in aliases for versal-net-ipp-rev1.9.dts
mtd: spi-nor: Remove SPI_NOR_OCTAL_READ flag
soc: zynqmp: Add the IDcode for TEG variant
zlib: Remove incorrect ZLIB_VERSION
zlib: Port fix for CVE-2016-9841 to U-Boot
zlib: Rename write variable to wnext (window write index)
zlib: Rename this variable to here (current decoding table entry)
configs: versal: Disable the config for spansion flash
|
| | | |
| | | |
| | | |
| | | | |
m25p80: Consider 4byte address for octal ddr mode
|
| | | |
| | | |
| | | |
| | | | |
vck190: Add 2g OSPI flash
|
| | | |
| | | |
| | | |
| | | |
| | | |
| | | | |
versal: Add support for xqvm1102, xqve2102, xqvp2502, xqvp1052 and xqve2302
versal: Add support for xave2602 and xave2802
versal: SE variants support
|
| | | |
| | | |
| | | |
| | | |
| | | |
| | | | |
versal: Add support for the SE variant of xcvp1002
versal: Add support for the SE variant of xcvm2152
versal: Add support for xcvm2152
|
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | | |
1. Make bit or bin or pdi as required input for firmware recipes. If bit
or bin or pdi of respective soc_family is not included then raise
bitbake parse skip recipe errors.
2. Check for absolute dtbo/bin/bit path if any of these files exits
in SRC_URI.
3. Skip recipe if both dtbo and dts/dtsi found in SRC_URI.
4. Fix logic to convert from bit to bin for zynqmp or zynq soc family.
Signed-off-by: Sandeep Gundlupet Raju <sandeep.gundlupet-raju@amd.com>
Signed-off-by: Mark Hatle <mark.hatle@amd.com>
|
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | | |
Changelog:
Configure both channel IDs for aie_trace & aie_profile (#8038)
Fix bug in Edge sw_emu flow (#8044)
add cmake definition for linux builds (#8042)
Improvements to AIE trace on clients (#8039)
Fixing the map operator logic (#8040)
Implementation of Hip stream apis (#8018)
Hip test tidy up (#8029)
Simplifying hip memory APIs interfaces. (#8037)
CR-1192489: Memory Module Metric Event IDs are produced in tiles where no Mem
Port kernel driver to Linux 6.8 (#8005)
Fix on client to correct partition info device query request (#8033)
VITIS-11112 HIP Binding: Memory Management. (#7983)
Signed-off-by: saumya garg <saumya.garg@amd.com>
Signed-off-by: Mark Hatle <mark.hatle@amd.com>
|