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# AMD SDT BSP Machines files
This section describes the SDT BSP machine files generation.
## SDT Build Instructions
The Yocto Project setup for the System Device Tree (SDT) workflow is as follows.
Be sure to read everything below.
> **Pre-requisites:**
> * Follow [System Device Tree Instructions](https://github.com/Xilinx/system-device-tree-xlnx/blob/master/README.md)
> to generate the SDT output.
> * To use the SDT version of the embedded software (firmware) as well as system
> configuration, you must build through gen-machineconf tool. This tool is passed
> a output of system device tree directory.
> * meta-xilinx-standalone-sdt layer depends on meta-openamp layer make sure
> meta-openamp is cloned and add using `bitbake-layers` command.
> **Note:** SDT builds for following devices are not supported in 2024.2 release.
> * MicroBlaze
1. Follow [Building Instructions](../README.building.md) upto step 6.
2. Export gen-machineconf tool.
```
$ export PATH=$PATH:<ABSOLUTE_PATH>/gen-machine-conf
```
3. Run the script from the build or ${TOPDIR} directory. This step describes
System Device Tree (SDT) with and without pl overlays. Configruations are same
for both SDT with and without pl overlays except for linux dts content.
> **Note:**
> 1. The -c option should point either <path-to-machine-bsp-layer>/conf or <path-to-build-directory>/build/conf
> directory.
> 2. The -l option will automatically add the necessary parameters to the
local.conf file. If you need to re-run this comment, you just clear the
parameters from the end of the file. Without the -l option the items are
printed to the screen and must be manually added to your conf/local.conf
> 3. The --soc-family argument is an optional argument and user can skip this.
> 4. By default minimal set of multiconfigs are generated by gen-machineconf tool.
> To enable full multiconfig(APU/RPU baremetal or FreeRTOS) then use
> `--multiconfigfull` option.
> **Recommended SDT Machine nomenclature:**
>
> 1. Machine Configuration file nomenclature: `<soc-family>-<board-name>-sdt-<design-name>`
> * Example: `MACHINE = "versal-vek280-sdt-seg"`
>
> 2. BSP Reference design name:
> * `full` - Zynq-7000/ZynqMP full bitstream loading Vivado design.
> * `dfx` - ZynqMP/Versal full bitstream loading Vivado design.
> * `seg` - Versal Segmented Configuration Vivado design.
>
> **Note:** In machine file nomencalutre `<soc-family>-<board-name>-sdt-<design-name>`
> If design-name suffix is not set or defined then it is treated as flat design
> without dynamic PL configuration.
a. Without SDT pl overlay:
```
$ gen-machineconf parse-sdt --hw-description <path_to_sdtgen_output_directory> -c <conf-directory> -l <path-to-build-directory>/build/conf/local.conf --machine-name <soc-family>-<board-name>-sdt-<design-name>
```
b. With SDT pl overlay:
To generate SDT pl overlay run gen-machineconf command with
`-g {full|dfx}` option. Once SDT pl overlay command is executed successfully
pl.dtsi will be generated under <conf-directory>/dts/${MACHINE}/pl-overlay-{full|dfx}
directory. User can use this pl.dtsi as input to full or dfx static firmware
recipes. See https://github.com/Xilinx/meta-xilinx/blob/master/docs/README.dfx.user.dts.md
for more details.
> **Note:** DFx partial dtsi is not processed by gen-machineconf(lopper) tool, User
> needs to use the *_partial.dtsi and *_partial.pdi/bit from sdtgen output
> artifacts to DFx partial firmware recipes.
* Zynq-700 or ZynqMP Full bitstream or Versal Segmented Configuration:
```
$ gen-machineconf parse-sdt --hw-description <path_to_sdtgen_output_directory> -c <conf-directory> -l <path-to-build-directory>/build/conf/local.conf --machine-name <soc-family>-<board-name>-sdt-<design-name> -g full
```
* ZynqMP or Versal DFx:
```
$ gen-machineconf parse-sdt --hw-description <path_to_sdtgen_output_directory> -c <conf-directory> -l <path-to-build-directory>/build/conf/local.conf --machine-name <soc-family>-<board-name>-sdt-<design-name> -g dfx
```
For example, Zynq-7000:
```
$ gen-machineconf parse-sdt --hw-description <path_to_sdtgen_output_directory> -c <conf-directory> -l <path-to-build-directory>/build/conf/local.conf --machine-name <soc-family>-<board-name>-sdt-<design-name>
```
The following will be written to the end of the <path-to-build-directory>/build/conf/local.conf file:
```
# Use the newly generated MACHINE
MACHINE = "zynq-zc702-sdt"
# Avoid errors in some baremetal configs as these layers may be present
# but are not used. Note the following lines are optional and can be
# safetly disabled.
SKIP_META_VIRT_SANITY_CHECK = "1"
SKIP_META_SECURITY_SANITY_CHECK = "1"
SKIP_META_TPM_SANITY_CHECK = "1"
```
For example, ZynqMP:
```
$ gen-machineconf parse-sdt --hw-description <path_to_sdtgen_output_directory> -c <conf-directory> -l <path-to-build-directory>/build/conf/local.conf --machine-name <soc-family>-<board-name>-sdt-<design-name>
```
The following will be written to the end of the <path-to-build-directory>/conf/local.conf file:
```
# Use the newly generated MACHINE
MACHINE = "zynqmp-zcu102-sdt"
# Avoid errors in some baremetal configs as these layers may be present
# but are not used. Note the following lines are optional and can be
# safetly disabled.
SKIP_META_VIRT_SANITY_CHECK = "1"
SKIP_META_SECURITY_SANITY_CHECK = "1"
SKIP_META_TPM_SANITY_CHECK = "1"
```
For example, Versal:
```
$ gen-machineconf parse-sdt --hw-description <path_to_sdtgen_output_directory> -c <conf-directory> -l <path-to-build-directory>/build/conf/local.conf --machine-name <soc-family>-<board-name>-sdt-<design-name>
```
The following will be written to the end of the <path-to-build-directory>/conf/local.conf file:
```
# Use the newly generated MACHINE
MACHINE = "versal-vmk180-sdt"
# Avoid errors in some baremetal configs as these layers may be present
# but are not used. Note the following lines are optional and can be
# safetly disabled.
SKIP_META_VIRT_SANITY_CHECK = "1"
SKIP_META_SECURITY_SANITY_CHECK = "1"
SKIP_META_TPM_SANITY_CHECK = "1"
```
> **Bitbake Performance Note:**
Each BBMULTICONFIG value requires all of the recipes to be parsed for that
configuration. Thus each multiconfig will add more parsing time. A long list
can lead to a very slow parse (many minutes). To speed up parsing, it is
suggested that you trim this down to only the configurations you require.
A minimum configuration is included with the generated configuration.
4. Build your project, You should now be able to build your project normally.
See the Yocto Project documentation if you have questions on how to work with
the multiconfig recipes. The following is a simple build for testing.
5. Continue [Building Instructions](https://github.com/Xilinx/meta-xilinx/blob/master/README.building.md)
from step 8.
>**Note:** Only AMD eval boards have the dtsi in System Device Tree repo, for custom
> board user has to follow one of the following methods.
> 1. Patch System Device Tree to include the custom board dtsi and include the
> custom board dtsi during sdtgen build step.
> `% sdtgen set_dt_param -board_dts <custom-board-dtsi-name>`
>
> 2. Create a custom board dtsi file and use EXTRA_DT_INCLUDE_FILES variable to
> include the custom board dtsi to final dtb. Here is the example usage.
> `EXTRA_DT_INCLUDE_FILES:append = " <path-to-directory>/<custom-board>.dtsi"`
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