mesa: upgrade 21.3.6 -> 21.3.7

Changelog:
=========
Bug fixes
---------
lavapipe: dEQP-VK.spirv_assembly.instruction.compute.float16.arithmetic_3.step fails
ANV: Bad output from TransformFeedback . Regression from Mesa 21. Something to do with VB+XFB -> VB+XFB dependency?

Changes
-------
pan/bi: Avoid *FADD.v2f16 hazard in optimizer
pan/bi: Avoid *FADD.v2f16 hazard in scheduler
pan/bi: Lower swizzles on CSEL.i32/MUX.i32
panvk: Use more reliable assert for UBO pushing
radv: Fix preamble argument order.
ir3/spill: Fix simplify_phi_nodes with multiple loop nesting
lavapipe: fix sampler + sampler view leaks.
lavapipe: reference gallium fences correctly.
crocus: fix leak on gen4/5 stencil fallback blit path.
i915g: Initialize the rest of the "from_nir" temporary VS struct.
pick_status.json: Update to dabba7d7263be6ffb6f3676465e92c65952fa824
pick_status.json: Mark b07372312d7053f2ef5c858ceb1fbf9ade5e7c52 as denominated
gallivm/nir: Call nir_lower_bool_to_int32 after nir_opt_algebraic_late
nir: All set-on-comparison opcodes can take all float types
intel/fs: Don't optimize out 1.0*x and -1.0*x
spriv: Produce correct result for GLSLstd450Step with NaN
spirv: Produce correct result for GLSLstd450Modf with Inf
spirv: Produce correct result for GLSLstd450Tanh with NaN
nir: Properly handle various exceptional values in frexp
nir: Produce correct results for atan with NaN
nir: Add missing dependency on nir_opcodes.py
anv: Call vk_command_buffer_finish if create fails
dri: avoid NULL deref of DrawBuffer on flush
nir: fix lower_memcpy
anv/genxml/intel/fs: fix binding shader record entry
anv: don't set color state when input state was requested
ac/surface: add more elements to meta equations because HTILE can use them
lavapipe: use util_pack_color_union() for generating clear colors
aux/draw: fix llvm tcs lane vec generation
zink: always set VkPipelineMultisampleStateCreateInfo::pSampleMask
zink: always invalidate streamout counter buffer if not resuming
iris: Don't fast clear with the view format
r300: fix transformation of abs modifiers with negate
radeonsi: workaround Specviewperf13 Catia hang on GFX9
radeonsi: fix depth stencil multi sample texture blit
glx: fix pbuffer refcount init
radv/winsys: fix initializing debug/perftest options if multiple instances
intel/genxml: add PIPE_CONTROL field for L3 read only cache invalidation
anv: invalidate L3 read only cache when VF cache is invalidated
iris: invalidate L3 read only cache when VF cache is invalidated
iris: fix a leak on surface states
mesa/st: always use DXT5 when transcoding ASTC format
tegra: Use private reference count for sampler views
tegra: Use private reference count for resources
radv: Disable IB2 on compute queues.
venus: properly destroy deferred ahb image before real image creation

(From OE-Core rev: 31daf916d218d5e6e95bac857cbeb0d44901e4b3)

Signed-off-by: Wang Mingyu <wangmy@fujitsu.com>
Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>

0 files changed, 0 insertions, 0 deletions