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| author | Sivaprasad Addepalli <sivaprasad.addepalli@xilinx.com> | 2024-10-09 08:07:32 +0530 |
|---|---|---|
| committer | Siva Addepalli <sivaprasad.addepalli@xilinx.com> | 2024-10-09 08:57:19 +0530 |
| commit | a671623678c32ce976d924f89f56f17e7c678f98 (patch) | |
| tree | 6b695798bdb85044b651729de9ceed2550970d33 | |
| parent | cb678432371e3a990ab05381ff39ab4317e0f8d9 (diff) | |
| download | meta-xilinx-a671623678c32ce976d924f89f56f17e7c678f98.tar.gz | |
linux-xlnx : Updated SRCREV for 2024.2_6115
xilinx-ai-engine: remove unused core_reg struct definitions
xilinx-ai-engine: remove old core_regs for aie1 arch
xilinx-ai-engine: remove old core_regs for aieml arch
xilinx-ai-engine: Remove old aie_part_clear_core_regs call
xilinx-ai-engine: Add new api to clear the core regs
xilinx-ai-engine: Add definitions for core regs to be zeroized for aie1
xilinx-ai-engine: Add core regs group for aieml arch
xilinx-ecdsa: Fix panic on rmmod by updating platform driver data handling
net: axienet: Use XAXIENET_1_2p5G MAC type for AXI 1G/2.5G ethernet
dt-bindings: net: xlnx,axi-ethernet: Correct description of "xlnx,switch-x-sgmii" property
net: emaclite: Adopt clock support
net: emaclite: Replace alloc_etherdev() with devm_alloc_etherdev()
dt-bindings: net: emaclite: Add clock support
staging: xilinx-tsn: Add IRQ-safe spinlock to protect TX BD processing
misc: xilinx-ai-engine: Added support for DMABUF SYNC IOCTL
misc: xilinx-ai-engine: Added support to map/unmap dmabuf
misc: xilinx-ai-engine: Added support to mmap dmabuf fd
misc: xilinx-ai-engine: Added support to free dma memory
misc: xilinx-ai-engine: Added support to allocate dma memory
irqchip: xilinx: Add missing null check for of_find_device_by_node()
PCI: xilinx-cpm: Add support for Versal CPM5 Root Port controller 1
dt-bindings: PCI: xilinx-cpm: Add compatible string for CPM5 host1
drm: xlnx: hdmi: Add support for reading 4 block EDID
phy: xilinx-xhdmiphy: Fix FRL mode issue with versal devices
staging: xilinx-tsn: Enable Traffic Shaping Support with QDisc Framework
misc: xilinx-ai-engine: Add APIs to get existing AIE partitionsfd list to facilitating debugging
watchdog: xilinx_wwdt: Calculate max_hw_heartbeat_ms using clock frequency
Revert "watchdog: xilinx_wwdt: Add check for timeout limit and set maximum value if exceeded"
arm64: xilinx: Fix file location described in zynqmp-p-a2197-00-revA.dts
| -rw-r--r-- | meta-xilinx-core/recipes-kernel/linux/linux-xlnx_6.6.40-v2024.2.bb | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/meta-xilinx-core/recipes-kernel/linux/linux-xlnx_6.6.40-v2024.2.bb b/meta-xilinx-core/recipes-kernel/linux/linux-xlnx_6.6.40-v2024.2.bb index 9eb1fcac..588928b4 100644 --- a/meta-xilinx-core/recipes-kernel/linux/linux-xlnx_6.6.40-v2024.2.bb +++ b/meta-xilinx-core/recipes-kernel/linux/linux-xlnx_6.6.40-v2024.2.bb | |||
| @@ -1,7 +1,7 @@ | |||
| 1 | LINUX_VERSION = "6.6.40" | 1 | LINUX_VERSION = "6.6.40" |
| 2 | YOCTO_META ?= "git://git.yoctoproject.org/yocto-kernel-cache;type=kmeta;name=meta;branch=yocto-6.6;destsuffix=yocto-kmeta" | 2 | YOCTO_META ?= "git://git.yoctoproject.org/yocto-kernel-cache;type=kmeta;name=meta;branch=yocto-6.6;destsuffix=yocto-kmeta" |
| 3 | KBRANCH="xlnx_rebase_v6.6_LTS" | 3 | KBRANCH="xlnx_rebase_v6.6_LTS" |
| 4 | SRCREV = "9f541a58e4c7d2780f71c6c2c38626eb66130556" | 4 | SRCREV = "1e1058a370bc386aac4066ee63aa5a965d1c92ac" |
| 5 | SRCREV_meta = "5d0809d0d939c7738cb6e5391126c73fd0e4e865" | 5 | SRCREV_meta = "5d0809d0d939c7738cb6e5391126c73fd0e4e865" |
| 6 | 6 | ||
| 7 | KCONF_AUDIT_LEVEL="0" | 7 | KCONF_AUDIT_LEVEL="0" |