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| author | Sivaprasad Addepalli <sivaprasad.addepalli@xilinx.com> | 2023-09-10 16:28:12 +0530 |
|---|---|---|
| committer | Siva Addepalli <sivaprasad.addepalli@xilinx.com> | 2023-09-11 22:59:35 +0530 |
| commit | 0c8d380e1741c5bb6cfa3786dc9a330811c0e6bf (patch) | |
| tree | c8cbbd3683aa879ec92ce01b083b51b0a292d6ac /meta-xilinx-core/recipes-bsp/fpga-manager-script/files/fpgautil.c | |
| parent | 25213a587b472651ed3481db726fd839a5958c3f (diff) | |
| download | meta-xilinx-0c8d380e1741c5bb6cfa3786dc9a330811c0e6bf.tar.gz | |
u-boot-xlnx : Updated SRCREV for 2023.1_1423
arm64: zynqmp: Add resets property for uart0 in KD240 board
Signed-off-by: Siva Addepalli <sivaprasad.addepalli@xilinx.com>
Diffstat (limited to 'meta-xilinx-core/recipes-bsp/fpga-manager-script/files/fpgautil.c')
0 files changed, 0 insertions, 0 deletions