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| author | Sivaprasad Addepalli <sivaprasad.addepalli@xilinx.com> | 2024-03-18 19:15:36 +0530 |
|---|---|---|
| committer | Siva Addepalli <sivaprasad.addepalli@xilinx.com> | 2024-03-18 20:17:09 +0530 |
| commit | 5ae412cfed7fa68e0cda39faa7bd714b3d5b32af (patch) | |
| tree | c36ffc8393fc7661a3e4ee2ab19118a306e2379b /meta-xilinx-core/recipes-devtools/qemu/qemu-xilinx-7.1.0/0005-qemu-Do-not-include-file-if-not-exists.patch | |
| parent | e4339455f0d47f336e627f743c75566551d7b547 (diff) | |
| download | meta-xilinx-5ae412cfed7fa68e0cda39faa7bd714b3d5b32af.tar.gz | |
embeddedsw : Updated SRCREV for 2024.1_7691
lib: sw_apps: Fix the race condition when picking a linker from an external path
scripts: pyesw: retarget_app: Remove the dependency of xiltimer in embedded applications
sw_apps: imgsel: zynqmp: Added validation check for SOM usecase
rfdc: CMakeLists dependencies
dfeprach: CMakeLists dependencies
dfeofdm: CMakeLists dependencies
dfemix: CMakeLists dependencies
dfeequ: CMakeLists dependencies
dfeccf: CMakeLists dependencies
trngpsv: Fix doxygen warnings
xilpm: versal_common: server: fix MISRA-C rule 4.7
sw_apps: Added support for Microblaze RISC-V
sw_services:xilsecure:Code redundancy is removed
pciepsu: Add Egress transfer support
Add Authentication Optimization support for MetaHeader
zynq_fsbl: fix prints for 32 bit variables
zynqmp_fsbl: fix prints for 32 bit variables
xilplmi: fix prints for 32 bit variables
dp14txss:dp14rxss: Removed the option of self_test example design
BSP: cortexr5: Move the _TCM_*_REGION definitions to a C source file
drivers:trngpsv:updated yaml file
xilloader: macronix 2G flash part support
xilpm: Secure lockdown house clean time out
Revert "xilpm: versal_net: client: add idle call back support"
csudma: Add doxygen fixes
Diffstat (limited to 'meta-xilinx-core/recipes-devtools/qemu/qemu-xilinx-7.1.0/0005-qemu-Do-not-include-file-if-not-exists.patch')
0 files changed, 0 insertions, 0 deletions